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Fix pr4091: Add support for "m" constraint in ARM inline assembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72105 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -89,6 +89,13 @@ public:
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// Include the pieces autogenerated from the target description.
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#include "ARMGenDAGISel.inc"
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private:
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/// SelectInlineAsmMemoryOperand - Implement addressing mode selection for
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/// inline asm expressions.
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virtual bool SelectInlineAsmMemoryOperand(const SDValue &Op,
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char ConstraintCode,
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std::vector<SDValue> &OutOps);
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};
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}
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@ -881,6 +888,21 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
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return SelectCode(Op);
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}
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bool ARMDAGToDAGISel::
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SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode,
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std::vector<SDValue> &OutOps) {
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assert(ConstraintCode == 'm' && "unexpected asm memory constraint");
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SDValue Base, Offset, Opc;
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if (!SelectAddrMode2(Op, Op, Base, Offset, Opc))
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return true;
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OutOps.push_back(Base);
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OutOps.push_back(Offset);
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OutOps.push_back(Opc);
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return false;
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}
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/// createARMISelDag - This pass converts a legalized DAG into a
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/// ARM-specific DAG, ready for instruction scheduling.
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///
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@ -124,6 +124,9 @@ namespace {
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virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode);
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void printModuleLevelGV(const GlobalVariable* GVar);
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bool printInstruction(const MachineInstr *MI); // autogenerated.
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@ -769,6 +772,15 @@ bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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return false;
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}
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bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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unsigned OpNo, unsigned AsmVariant,
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const char *ExtraCode) {
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if (ExtraCode && ExtraCode[0])
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return true; // Unknown modifier.
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printAddrMode2Operand(MI, OpNo);
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return false;
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}
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void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
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++EmittedInsts;
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7
test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll
Normal file
7
test/CodeGen/ARM/2009-05-18-InlineAsmMem.ll
Normal file
@ -0,0 +1,7 @@
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; RUN: llvm-as < %s | llc -march=arm | grep swp
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; PR4091
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define void @foo(i32 %i, i32* %p) nounwind {
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%asmtmp = call i32 asm sideeffect "swp $0, $2, $3", "=&r,=*m,r,*m,~{memory}"(i32* %p, i32 %i, i32* %p) nounwind
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ret void
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}
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