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Fix register-dependent XCore tests

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130816 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2011-05-04 01:01:41 +00:00
parent 9dfb367a42
commit 22d28d2372
1 changed files with 3 additions and 6 deletions
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9
test/CodeGen/XCore/mul64.ll
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@ -9,7 +9,7 @@ entry:
}
; CHECK: umul_lohi:
; CHECK: ldc [[REG:r[0-9]+]], 0
; CHECK-NEXT: lmul r1, r0, r1, r0, [[REG]], [[REG]]
; CHECK-NEXT: lmul {{.*}}, [[REG]], [[REG]]
; CHECK-NEXT: retsp 0
define i64 @smul_lohi(i32 %a, i32 %b) {
@ -23,9 +23,7 @@ entry:
; CHECK: ldc
; CHECK-NEXT: mov
; CHECK-NEXT: maccs
; CHECK-NEXT: mov r0,
; CHECK-NEXT: mov r1,
; CHECK-NEXT: retsp 0
; CHECK: retsp 0
define i64 @mul64(i64 %a, i64 %b) {
entry:
@ -37,7 +35,6 @@ entry:
; CHECK-NEXT: lmul
; CHECK-NEXT: mul
; CHECK-NEXT: lmul
; CHECK-NEXT: mov r0,
define i64 @mul64_2(i64 %a, i32 %b) {
entry:
@ -50,4 +47,4 @@ entry:
; CHECK-NEXT: lmul
; CHECK-NEXT: mul
; CHECK-NEXT: add r1,
; CHECK-NEXT: retsp 0
; CHECK: retsp 0