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* Initialize the entire array statically, not member-at-a-time

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* Remove x86-specific comment re: intel vs. at&t assembly syntax


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14406 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Misha Brukman 2004-06-25 15:11:34 +00:00
parent 9ecf3bf708
commit 22e12076e9
3 changed files with 27 additions and 60 deletions
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29
lib/Target/PowerPC/PPC32AsmPrinter.cpp
View File

@ -411,8 +411,6 @@ bool Printer::runOnMachineFunction(MachineFunction &MF) {
return false;
}
void Printer::printOp(const MachineOperand &MO,
bool elideOffsetKeyword /* = false */) {
const MRegisterInfo &RI = *TM.getRegisterInfo();
@ -458,7 +456,8 @@ void Printer::printOp(const MachineOperand &MO,
O << MO.getSymbolName();
return;
default:
O << "<unknown operand type>"; return;
O << "<unknown operand type>";
return;
}
}
@ -509,14 +508,13 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
unsigned int i;
unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask;
unsigned int ArgType[5];
ArgType[0] = (Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask;
ArgType[1] = (Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask;
ArgType[2] = (Desc.TSFlags >> PPC32II::Arg2TypeShift) & PPC32II::ArgTypeMask;
ArgType[3] = (Desc.TSFlags >> PPC32II::Arg3TypeShift) & PPC32II::ArgTypeMask;
ArgType[4] = (Desc.TSFlags >> PPC32II::Arg4TypeShift) & PPC32II::ArgTypeMask;
unsigned int ArgType[] = {
(Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg2TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg3TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg4TypeShift) & PPC32II::ArgTypeMask
};
assert(((Desc.TSFlags & PPC32II::VMX) == 0) &&
"Instruction requires VMX support");
assert(((Desc.TSFlags & PPC32II::PPC64) == 0) &&
@ -585,15 +583,6 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
}
bool Printer::doInitialization(Module &M) {
// Tell gas we are outputting Intel syntax (not AT&T syntax) assembly.
//
// Bug: gas in `intel_syntax noprefix' mode interprets the symbol `Sp' in an
// instruction as a reference to the register named sp, and if you try to
// reference a symbol `Sp' (e.g. `mov ECX, OFFSET Sp') then it gets lowercased
// before being looked up in the symbol table. This creates spurious
// `undefined symbol' errors when linking. Workaround: Do not use `noprefix'
// mode, and decorate all register names with percent signs.
// O << "\t.intel_syntax\n";
Mang = new Mangler(M, true);
return false; // success
}

29
lib/Target/PowerPC/PPCAsmPrinter.cpp
View File

@ -411,8 +411,6 @@ bool Printer::runOnMachineFunction(MachineFunction &MF) {
return false;
}
void Printer::printOp(const MachineOperand &MO,
bool elideOffsetKeyword /* = false */) {
const MRegisterInfo &RI = *TM.getRegisterInfo();
@ -458,7 +456,8 @@ void Printer::printOp(const MachineOperand &MO,
O << MO.getSymbolName();
return;
default:
O << "<unknown operand type>"; return;
O << "<unknown operand type>";
return;
}
}
@ -509,14 +508,13 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
unsigned int i;
unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask;
unsigned int ArgType[5];
ArgType[0] = (Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask;
ArgType[1] = (Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask;
ArgType[2] = (Desc.TSFlags >> PPC32II::Arg2TypeShift) & PPC32II::ArgTypeMask;
ArgType[3] = (Desc.TSFlags >> PPC32II::Arg3TypeShift) & PPC32II::ArgTypeMask;
ArgType[4] = (Desc.TSFlags >> PPC32II::Arg4TypeShift) & PPC32II::ArgTypeMask;
unsigned int ArgType[] = {
(Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg2TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg3TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg4TypeShift) & PPC32II::ArgTypeMask
};
assert(((Desc.TSFlags & PPC32II::VMX) == 0) &&
"Instruction requires VMX support");
assert(((Desc.TSFlags & PPC32II::PPC64) == 0) &&
@ -585,15 +583,6 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
}
bool Printer::doInitialization(Module &M) {
// Tell gas we are outputting Intel syntax (not AT&T syntax) assembly.
//
// Bug: gas in `intel_syntax noprefix' mode interprets the symbol `Sp' in an
// instruction as a reference to the register named sp, and if you try to
// reference a symbol `Sp' (e.g. `mov ECX, OFFSET Sp') then it gets lowercased
// before being looked up in the symbol table. This creates spurious
// `undefined symbol' errors when linking. Workaround: Do not use `noprefix'
// mode, and decorate all register names with percent signs.
// O << "\t.intel_syntax\n";
Mang = new Mangler(M, true);
return false; // success
}

29
lib/Target/PowerPC/PowerPCAsmPrinter.cpp
View File

@ -411,8 +411,6 @@ bool Printer::runOnMachineFunction(MachineFunction &MF) {
return false;
}
void Printer::printOp(const MachineOperand &MO,
bool elideOffsetKeyword /* = false */) {
const MRegisterInfo &RI = *TM.getRegisterInfo();
@ -458,7 +456,8 @@ void Printer::printOp(const MachineOperand &MO,
O << MO.getSymbolName();
return;
default:
O << "<unknown operand type>"; return;
O << "<unknown operand type>";
return;
}
}
@ -509,14 +508,13 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
unsigned int i;
unsigned int ArgCount = Desc.TSFlags & PPC32II::ArgCountMask;
unsigned int ArgType[5];
ArgType[0] = (Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask;
ArgType[1] = (Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask;
ArgType[2] = (Desc.TSFlags >> PPC32II::Arg2TypeShift) & PPC32II::ArgTypeMask;
ArgType[3] = (Desc.TSFlags >> PPC32II::Arg3TypeShift) & PPC32II::ArgTypeMask;
ArgType[4] = (Desc.TSFlags >> PPC32II::Arg4TypeShift) & PPC32II::ArgTypeMask;
unsigned int ArgType[] = {
(Desc.TSFlags >> PPC32II::Arg0TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg1TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg2TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg3TypeShift) & PPC32II::ArgTypeMask,
(Desc.TSFlags >> PPC32II::Arg4TypeShift) & PPC32II::ArgTypeMask
};
assert(((Desc.TSFlags & PPC32II::VMX) == 0) &&
"Instruction requires VMX support");
assert(((Desc.TSFlags & PPC32II::PPC64) == 0) &&
@ -585,15 +583,6 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
}
bool Printer::doInitialization(Module &M) {
// Tell gas we are outputting Intel syntax (not AT&T syntax) assembly.
//
// Bug: gas in `intel_syntax noprefix' mode interprets the symbol `Sp' in an
// instruction as a reference to the register named sp, and if you try to
// reference a symbol `Sp' (e.g. `mov ECX, OFFSET Sp') then it gets lowercased
// before being looked up in the symbol table. This creates spurious
// `undefined symbol' errors when linking. Workaround: Do not use `noprefix'
// mode, and decorate all register names with percent signs.
// O << "\t.intel_syntax\n";
Mang = new Mangler(M, true);
return false; // success
}