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[msan] Workaround for invalid origins in shufflevector.

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Makes origin propagation ignore literal undef operands, and,
in general, any operand we don't have origin for.

https://code.google.com/p/memory-sanitizer/issues/detail?id=56


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210472 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evgeniy Stepanov 2014-06-09 14:29:34 +00:00
parent 5b7ac8ba18
commit 24f5e55fce
2 changed files with 27 additions and 4 deletions
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12
lib/Transforms/Instrumentation/MemorySanitizer.cpp
View File

@ -1302,10 +1302,14 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
if (!Origin) {
Origin = OpOrigin;
} else {
Value *FlatShadow = MSV->convertToShadowTyNoVec(OpShadow, IRB);
Value *Cond = IRB.CreateICmpNE(FlatShadow,
MSV->getCleanShadow(FlatShadow));
Origin = IRB.CreateSelect(Cond, OpOrigin, Origin);
Constant *ConstOrigin = dyn_cast<Constant>(OpOrigin);
// No point in adding something that might result in 0 origin value.
if (!ConstOrigin || !ConstOrigin->isNullValue()) {
Value *FlatShadow = MSV->convertToShadowTyNoVec(OpShadow, IRB);
Value *Cond =
IRB.CreateICmpNE(FlatShadow, MSV->getCleanShadow(FlatShadow));
Origin = IRB.CreateSelect(Cond, OpOrigin, Origin);
}
}
}
return *this;

19
test/Instrumentation/MemorySanitizer/missing_origin.ll Normal file
View File

@ -0,0 +1,19 @@
; RUN: opt < %s -msan -msan-check-access-address=0 -msan-track-origins=1 -S | FileCheck -check-prefix=CHECK -check-prefix=CHECK %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Test that result origin is directy propagated from the argument,
; and is not affected by all the literal undef operands.
; https://code.google.com/p/memory-sanitizer/issues/detail?id=56
define <4 x i32> @Shuffle(<4 x i32> %x) nounwind uwtable sanitize_memory {
entry:
%y = shufflevector <4 x i32> %x, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
ret <4 x i32> %y
}
; CHECK-LABEL: @Shuffle(
; CHECK: [[A:%.*]] = load i32* {{.*}}@__msan_param_origin_tls,
; CHECK: store i32 [[A]], i32* @__msan_retval_origin_tls
; CHECK: ret <4 x i32>