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R600: Add a llvm.R600.store.swizzle intrinsics
This intrinsic is translated to ALLOC_EXPORT_WORD1_SWIZ, hence its name. It is used to store vs/fs outputs Patch by: Vincent Lejeune Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173297 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -269,8 +269,24 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter(
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case AMDGPU::EG_ExportSwz:
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case AMDGPU::R600_ExportSwz: {
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// Instruction is left unmodified if its not the last one of its type
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bool isLastInstructionOfItsType = true;
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unsigned InstExportType = MI->getOperand(1).getImm();
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for (MachineBasicBlock::iterator NextExportInst = llvm::next(I),
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EndBlock = BB->end(); NextExportInst != EndBlock;
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NextExportInst = llvm::next(NextExportInst)) {
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if (NextExportInst->getOpcode() == AMDGPU::EG_ExportSwz ||
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NextExportInst->getOpcode() == AMDGPU::R600_ExportSwz) {
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unsigned CurrentInstExportType = NextExportInst->getOperand(1)
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.getImm();
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if (CurrentInstExportType == InstExportType) {
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isLastInstructionOfItsType = false;
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break;
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}
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}
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}
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bool EOP = (llvm::next(I)->getOpcode() == AMDGPU::RETURN)? 1 : 0;
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if (!EOP)
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if (!EOP && !isLastInstructionOfItsType)
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return BB;
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unsigned CfInst = (MI->getOpcode() == AMDGPU::EG_ExportSwz)? 84 : 40;
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BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(MI->getOpcode()))
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@ -282,7 +298,7 @@ MachineBasicBlock * R600TargetLowering::EmitInstrWithCustomInserter(
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.addOperand(MI->getOperand(5))
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.addOperand(MI->getOperand(6))
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.addImm(CfInst)
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.addImm(1);
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.addImm(EOP);
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break;
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}
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}
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@ -599,6 +599,17 @@ multiclass ExportPattern<Instruction ExportInst, bits<8> cf_inst> {
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(ExportInst R600_Reg128:$src, imm:$type, imm:$arraybase,
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0, 1, 2, 3, cf_inst, 0)
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>;
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def : Pat<(EXPORT (v4f32 R600_Reg128:$src), (i32 1),
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(i32 imm:$type), (i32 imm:$arraybase), (i32 imm)),
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(ExportInst R600_Reg128:$src, imm:$type, imm:$arraybase,
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0, 1, 2, 3, cf_inst, 0)
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>;
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def : Pat<(int_R600_store_swizzle (v4f32 R600_Reg128:$src), imm:$arraybase,
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imm:$type),
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(ExportInst R600_Reg128:$src, imm:$type, imm:$arraybase,
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0, 1, 2, 3, cf_inst, 0)
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>;
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}
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multiclass SteamOutputExportPattern<Instruction ExportInst,
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@ -19,6 +19,8 @@ let TargetPrefix = "R600", isTarget = 1 in {
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Intrinsic<[llvm_float_ty], [llvm_i32_ty], [IntrReadMem]>;
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def int_R600_load_input_linear :
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Intrinsic<[llvm_float_ty], [llvm_i32_ty], [IntrReadMem]>;
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def int_R600_store_swizzle :
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Intrinsic<[], [llvm_v4f32_ty, llvm_i32_ty, llvm_i32_ty], []>;
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def int_R600_store_stream_output :
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Intrinsic<[], [llvm_v4f32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], []>;
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def int_R600_store_pixel_color :
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