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Remove some unnecessary forward declarations and put a couple more

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where they're supposed to reside.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232014 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher
2015-03-12 06:07:16 +00:00
parent 013ed4aa69
commit 257ea92cdf
8 changed files with 3 additions and 24 deletions
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4
lib/Target/ARM/ARMBaseRegisterInfo.h
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@@ -21,10 +21,6 @@
#include "ARMGenRegisterInfo.inc" #include "ARMGenRegisterInfo.inc"
namespace llvm { namespace llvm {
class ARMSubtarget;
class ARMBaseInstrInfo;
class Type;
/// Register allocation hints. /// Register allocation hints.
namespace ARMRI { namespace ARMRI {
enum { enum {

2
lib/Target/Hexagon/HexagonInstrInfo.h
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@@ -26,7 +26,7 @@
namespace llvm { namespace llvm {
struct EVT; struct EVT;
class HexagonSubtarget;
class HexagonInstrInfo : public HexagonGenInstrInfo { class HexagonInstrInfo : public HexagonGenInstrInfo {
virtual void anchor(); virtual void anchor();
const HexagonRegisterInfo RI; const HexagonRegisterInfo RI;

5
lib/Target/Hexagon/HexagonRegisterInfo.h
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@@ -37,11 +37,6 @@
#define HEXAGON_RESERVED_REG_2 Hexagon::R11 #define HEXAGON_RESERVED_REG_2 Hexagon::R11
namespace llvm { namespace llvm {
class HexagonSubtarget;
class HexagonInstrInfo;
class Type;
struct HexagonRegisterInfo : public HexagonGenRegisterInfo { struct HexagonRegisterInfo : public HexagonGenRegisterInfo {
HexagonRegisterInfo(); HexagonRegisterInfo();

2
lib/Target/Mips/MipsRegisterInfo.h
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@@ -21,8 +21,6 @@
#include "MipsGenRegisterInfo.inc" #include "MipsGenRegisterInfo.inc"
namespace llvm { namespace llvm {
class Type;
class MipsRegisterInfo : public MipsGenRegisterInfo { class MipsRegisterInfo : public MipsGenRegisterInfo {
public: public:
MipsRegisterInfo(); MipsRegisterInfo();

2
lib/Target/PowerPC/PPCInstrInfo.h
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@@ -63,7 +63,7 @@ enum PPC970_Unit {
}; };
} // end namespace PPCII } // end namespace PPCII
class PPCSubtarget;
class PPCInstrInfo : public PPCGenInstrInfo { class PPCInstrInfo : public PPCGenInstrInfo {
PPCSubtarget &Subtarget; PPCSubtarget &Subtarget;
const PPCRegisterInfo RI; const PPCRegisterInfo RI;

4
lib/Target/PowerPC/PPCRegisterInfo.h
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@@ -22,10 +22,6 @@
#include "PPCGenRegisterInfo.inc" #include "PPCGenRegisterInfo.inc"
namespace llvm { namespace llvm {
class PPCSubtarget;
class TargetInstrInfo;
class Type;
class PPCRegisterInfo : public PPCGenRegisterInfo { class PPCRegisterInfo : public PPCGenRegisterInfo {
DenseMap<unsigned, unsigned> ImmToIdxMap; DenseMap<unsigned, unsigned> ImmToIdxMap;
const PPCTargetMachine &TM; const PPCTargetMachine &TM;

4
lib/Target/Sparc/SparcRegisterInfo.h
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@@ -20,10 +20,6 @@
#include "SparcGenRegisterInfo.inc" #include "SparcGenRegisterInfo.inc"
namespace llvm { namespace llvm {
class TargetInstrInfo;
class Type;
struct SparcRegisterInfo : public SparcGenRegisterInfo { struct SparcRegisterInfo : public SparcGenRegisterInfo {
SparcRegisterInfo(); SparcRegisterInfo();

4
lib/Target/X86/X86RegisterInfo.h
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@@ -20,9 +20,7 @@
#include "X86GenRegisterInfo.inc" #include "X86GenRegisterInfo.inc"
namespace llvm { namespace llvm {
class Type; class X86Subtarget;
class TargetInstrInfo;
class X86Subtarget;
class X86RegisterInfo final : public X86GenRegisterInfo { class X86RegisterInfo final : public X86GenRegisterInfo {
public: public: