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Enhance boolean simplification to handle 16-/64-bit RDRAND
- RDRAND always clears the destination value when a random value is not available (i.e. CF == 0). This value is truncated or zero-extended as the false boolean value to be returned. Boolean simplification needs to skip this 'zext' or 'trunc' node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178312 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -15821,8 +15821,9 @@ static SDValue checkBoolTestSetCCCombine(SDValue Cmp, X86::CondCode &CC) {
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// Quit if the constant is neither 0 or 1.
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return SDValue();
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// Skip 'zext' node.
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if (SetCC.getOpcode() == ISD::ZERO_EXTEND)
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// Skip 'zext' or 'trunc' node.
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if (SetCC.getOpcode() == ISD::ZERO_EXTEND ||
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SetCC.getOpcode() == ISD::TRUNCATE)
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SetCC = SetCC.getOperand(0);
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switch (SetCC.getOpcode()) {
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@ -15841,9 +15842,13 @@ static SDValue checkBoolTestSetCCCombine(SDValue Cmp, X86::CondCode &CC) {
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return SDValue();
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// Quit if false value is not a constant.
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if (!FVal) {
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// A special case for rdrand, where 0 is set if false cond is found.
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SDValue Op = SetCC.getOperand(0);
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if (Op.getOpcode() != X86ISD::RDRAND)
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// Skip 'zext' or 'trunc' node.
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if (Op.getOpcode() == ISD::ZERO_EXTEND ||
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Op.getOpcode() == ISD::TRUNCATE)
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Op = Op.getOperand(0);
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// A special case for rdrand, where 0 is set if false cond is found.
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if (Op.getOpcode() != X86ISD::RDRAND || Op.getResNo() != 0)
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return SDValue();
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}
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// Quit if false value is not the constant 0 or 1.
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@ -39,7 +39,22 @@ define i32 @bax(<2 x i64> %c) {
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; CHECK: ret
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}
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define i32 @rnd(i32 %arg) nounwind uwtable {
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define i16 @rnd16(i16 %arg) nounwind uwtable {
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%1 = tail call { i16, i32 } @llvm.x86.rdrand.16() nounwind
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%2 = extractvalue { i16, i32 } %1, 0
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%3 = extractvalue { i16, i32 } %1, 1
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%4 = icmp eq i32 %3, 0
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%5 = select i1 %4, i16 0, i16 %arg
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%6 = add i16 %5, %2
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ret i16 %6
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; CHECK: rnd16
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; CHECK: rdrand
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; CHECK: cmov
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; CHECK-NOT: cmov
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; CHECK: ret
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}
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define i32 @rnd32(i32 %arg) nounwind uwtable {
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%1 = tail call { i32, i32 } @llvm.x86.rdrand.32() nounwind
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%2 = extractvalue { i32, i32 } %1, 0
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%3 = extractvalue { i32, i32 } %1, 1
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@ -47,7 +62,22 @@ define i32 @rnd(i32 %arg) nounwind uwtable {
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%5 = select i1 %4, i32 0, i32 %arg
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%6 = add i32 %5, %2
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ret i32 %6
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; CHECK: rnd
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; CHECK: rnd32
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; CHECK: rdrand
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; CHECK: cmov
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; CHECK-NOT: cmov
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; CHECK: ret
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}
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define i64 @rnd64(i64 %arg) nounwind uwtable {
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%1 = tail call { i64, i32 } @llvm.x86.rdrand.64() nounwind
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%2 = extractvalue { i64, i32 } %1, 0
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%3 = extractvalue { i64, i32 } %1, 1
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%4 = icmp eq i32 %3, 0
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%5 = select i1 %4, i64 0, i64 %arg
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%6 = add i64 %5, %2
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ret i64 %6
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; CHECK: rnd64
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; CHECK: rdrand
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; CHECK: cmov
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; CHECK-NOT: cmov
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@ -55,4 +85,6 @@ define i32 @rnd(i32 %arg) nounwind uwtable {
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}
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declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone
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declare { i16, i32 } @llvm.x86.rdrand.16() nounwind
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declare { i32, i32 } @llvm.x86.rdrand.32() nounwind
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declare { i64, i32 } @llvm.x86.rdrand.64() nounwind
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