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LSR needs to remember inserted instructions even in postinc mode, because
there could be multiple subexpressions within a single expansion which require insert point adjustment. This fixes PR7306. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105510 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -32,6 +32,7 @@ namespace llvm {
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std::map<std::pair<const SCEV *, Instruction *>, AssertingVH<Value> >
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InsertedExpressions;
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std::set<Value*> InsertedValues;
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std::set<Value*> InsertedPostIncValues;
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/// PostIncLoops - Addrecs referring to any of the given loops are expanded
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/// in post-inc mode. For example, expanding {1,+,1}<L> in post-inc mode
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@ -102,6 +103,10 @@ namespace llvm {
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/// clearPostInc - Disable all post-inc expansion.
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void clearPostInc() {
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PostIncLoops.clear();
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// When we change the post-inc loop set, cached expansions may no
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// longer be valid.
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InsertedPostIncValues.clear();
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}
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/// disableCanonicalMode - Disable the behavior of expanding expressions in
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@ -146,7 +151,7 @@ namespace llvm {
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/// inserted by the code rewriter. If so, the client should not modify the
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/// instruction.
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bool isInsertedInstruction(Instruction *I) const {
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return InsertedValues.count(I);
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return InsertedValues.count(I) || InsertedPostIncValues.count(I);
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}
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Value *visitConstant(const SCEVConstant *S) {
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@ -1312,7 +1312,9 @@ Value *SCEVExpander::expand(const SCEV *S) {
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}
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void SCEVExpander::rememberInstruction(Value *I) {
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if (PostIncLoops.empty())
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if (!PostIncLoops.empty())
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InsertedPostIncValues.insert(I);
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else
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InsertedValues.insert(I);
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// If we just claimed an existing instruction and that instruction had
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@ -132,3 +132,47 @@ for.inc131: ; preds = %for.body123, %for.b
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for.end134: ; preds = %for.inc131
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ret void
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}
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; LSR needs to remember inserted instructions even in postinc mode, because
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; there could be multiple subexpressions within a single expansion which
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; require insert point adjustment.
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; PR7306
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define fastcc i32 @GetOptimum() nounwind {
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bb:
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br label %bb1
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bb1: ; preds = %bb1, %bb
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%t = phi i32 [ 0, %bb ], [ %t2, %bb1 ] ; <i32> [#uses=1]
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%t2 = add i32 %t, undef ; <i32> [#uses=3]
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br i1 undef, label %bb1, label %bb3
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bb3: ; preds = %bb1
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%t4 = add i32 undef, -1 ; <i32> [#uses=1]
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br label %bb5
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bb5: ; preds = %bb16, %bb3
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%t6 = phi i32 [ %t17, %bb16 ], [ 0, %bb3 ] ; <i32> [#uses=3]
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%t7 = add i32 undef, %t6 ; <i32> [#uses=2]
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%t8 = add i32 %t4, %t6 ; <i32> [#uses=1]
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br i1 undef, label %bb9, label %bb10
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bb9: ; preds = %bb5
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br label %bb10
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bb10: ; preds = %bb9, %bb5
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br i1 undef, label %bb11, label %bb16
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bb11: ; preds = %bb10
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%t12 = icmp ugt i32 %t7, %t2 ; <i1> [#uses=1]
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%t13 = select i1 %t12, i32 %t2, i32 %t7 ; <i32> [#uses=1]
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br label %bb14
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bb14: ; preds = %bb11
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store i32 %t13, i32* null
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ret i32 %t8
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bb16: ; preds = %bb10
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%t17 = add i32 %t6, 1 ; <i32> [#uses=1]
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br label %bb5
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}
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