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Remove unused NEONFrm and ThumbMiscFrm ARM instruction formats.

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Renumber MiscFrm to 25.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106916 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson
2010-06-25 23:45:37 +00:00
parent 161476ec34
commit 2653263165
3 changed files with 7 additions and 22 deletions
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19
lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
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@ -2839,12 +2839,6 @@ static bool DisassembleNVTBLFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
return true;
}
static bool DisassembleNEONFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
unsigned short NumOps, unsigned &NumOpsAdded, BO) {
assert(0 && "Unreachable code!");
return false;
}
// Vector Get Lane (move scalar to ARM core register) Instructions.
// VGETLNi32, VGETLNs16, VGETLNs8, VGETLNu16, VGETLNu8: Rt Dn index
static bool DisassembleNEONGetLnFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
@ -3060,13 +3054,6 @@ static bool DisassembleMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
return false;
}
static bool DisassembleThumbMiscFrm(MCInst &MI, unsigned Opcode, uint32_t insn,
unsigned short NumOps, unsigned &NumOpsAdded, BO) {
assert(0 && "Unexpected thumb misc. instruction!");
return false;
}
/// FuncPtrs - FuncPtrs maps ARMFormat to its corresponding DisassembleFP.
/// We divide the disassembly task into different categories, with each one
/// corresponding to a specific instruction encoding format. There could be
@ -3098,12 +3085,12 @@ static const DisassembleFP FuncPtrs[] = {
&DisassembleVFPLdStMulFrm,
&DisassembleVFPMiscFrm,
&DisassembleThumbFrm,
&DisassembleNEONFrm,
&DisassembleMiscFrm,
&DisassembleNEONGetLnFrm,
&DisassembleNEONSetLnFrm,
&DisassembleNEONDupFrm,
&DisassembleMiscFrm,
&DisassembleThumbMiscFrm,
0,
0,
// VLD and VST (including one lane) Instructions.
&DisassembleNLdSt,