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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26856 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-03-19 05:33:30 +00:00
parent 210721aecc
commit 28b1a0b532
1 changed files with 16 additions and 0 deletions
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16
lib/Target/PowerPC/README.txt
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@ -506,6 +506,7 @@ Implement PPCInstrInfo::isLoadFromStackSlot/isStoreToStackSlot for vector
registers, to generate better spill code. registers, to generate better spill code.
===-------------------------------------------------------------------------=== ===-------------------------------------------------------------------------===
int foo(int N, int ***W, int **TK, int X) { int foo(int N, int ***W, int **TK, int X) {
int t, i; int t, i;
@ -518,5 +519,20 @@ int foo(int N, int ***W, int **TK, int X) {
We generate relatively atrocious code for this loop compared to gcc. We generate relatively atrocious code for this loop compared to gcc.
===-------------------------------------------------------------------------===
Altivec support. The first should be a single lvx from the constant pool, the
second should be a xor/stvx:
void foo(void) {
int x[8] __attribute__((aligned(128))) = { 1, 1, 1, 1, 1, 1, 1, 1 };
bar (x);
}
#include <string.h>
void foo(void) {
int x[8] __attribute__((aligned(128)));
memset (x, 0, sizeof (x));
bar (x);
}