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Remove debug option. Add comment on spill order determinism.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103961 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2010-05-17 20:01:22 +00:00
parent 6206124250
commit 2997985b4c
1 changed files with 4 additions and 7 deletions
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11
lib/CodeGen/RegAllocFast.cpp
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@ -35,9 +35,6 @@
#include <algorithm>
using namespace llvm;
static cl::opt<bool> VerifyFastRegalloc("verify-fast-regalloc", cl::Hidden,
cl::desc("Verify machine code before fast regalloc"));
STATISTIC(NumStores, "Number of stores added");
STATISTIC(NumLoads , "Number of loads added");
STATISTIC(NumCopies, "Number of copies coalesced");
@ -269,8 +266,10 @@ void RAFast::spillVirtReg(MachineBasicBlock::iterator MI,
void RAFast::spillAll(MachineInstr *MI) {
if (LiveVirtRegs.empty()) return;
isBulkSpilling = true;
for (LiveRegMap::iterator i = LiveVirtRegs.begin(),
e = LiveVirtRegs.end(); i != e; ++i)
// The LiveRegMap is keyed by an unsigned (the virtreg number), so the order
// of spilling here is deterministic, if arbitrary.
for (LiveRegMap::iterator i = LiveVirtRegs.begin(), e = LiveVirtRegs.end();
i != e; ++i)
spillVirtReg(MI, i);
LiveVirtRegs.clear();
isBulkSpilling = false;
@ -796,8 +795,6 @@ bool RAFast::runOnMachineFunction(MachineFunction &Fn) {
DEBUG(dbgs() << "********** FAST REGISTER ALLOCATION **********\n"
<< "********** Function: "
<< ((Value*)Fn.getFunction())->getName() << '\n');
if (VerifyFastRegalloc)
Fn.verify(this, true);
MF = &Fn;
MRI = &MF->getRegInfo();
TM = &Fn.getTarget();