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Flip on vectorization of bswap intrinsics.
The cost model conservatively assumes that it will always get scalarized and that's about as good as we can get with the generic TTI; reasoning whether a shuffle with an efficient lowering is available is hard. We can override that conservative estimate for some targets in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209125 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -43,6 +43,7 @@ static inline bool isTriviallyVectorizable(Intrinsic::ID ID) {
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case Intrinsic::rint:
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case Intrinsic::nearbyint:
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case Intrinsic::round:
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case Intrinsic::bswap:
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case Intrinsic::ctpop:
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case Intrinsic::pow:
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case Intrinsic::fma:
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@ -71,5 +71,49 @@ entry:
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ret void
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}
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declare i32 @llvm.bswap.i32(i32) nounwind readnone
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define void @vec_bswap_i32(i32* %a, i32* %b, i32* %c) {
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entry:
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%i0 = load i32* %a, align 4
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%i1 = load i32* %b, align 4
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%add1 = add i32 %i0, %i1
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%call1 = tail call i32 @llvm.bswap.i32(i32 %add1) nounwind readnone
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%arrayidx2 = getelementptr inbounds i32* %a, i32 1
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%i2 = load i32* %arrayidx2, align 4
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%arrayidx3 = getelementptr inbounds i32* %b, i32 1
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%i3 = load i32* %arrayidx3, align 4
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%add2 = add i32 %i2, %i3
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%call2 = tail call i32 @llvm.bswap.i32(i32 %add2) nounwind readnone
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%arrayidx4 = getelementptr inbounds i32* %a, i32 2
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%i4 = load i32* %arrayidx4, align 4
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%arrayidx5 = getelementptr inbounds i32* %b, i32 2
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%i5 = load i32* %arrayidx5, align 4
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%add3 = add i32 %i4, %i5
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%call3 = tail call i32 @llvm.bswap.i32(i32 %add3) nounwind readnone
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%arrayidx6 = getelementptr inbounds i32* %a, i32 3
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%i6 = load i32* %arrayidx6, align 4
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%arrayidx7 = getelementptr inbounds i32* %b, i32 3
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%i7 = load i32* %arrayidx7, align 4
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%add4 = add i32 %i6, %i7
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%call4 = tail call i32 @llvm.bswap.i32(i32 %add4) nounwind readnone
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store i32 %call1, i32* %c, align 4
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%arrayidx8 = getelementptr inbounds i32* %c, i32 1
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store i32 %call2, i32* %arrayidx8, align 4
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%arrayidx9 = getelementptr inbounds i32* %c, i32 2
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store i32 %call3, i32* %arrayidx9, align 4
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%arrayidx10 = getelementptr inbounds i32* %c, i32 3
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store i32 %call4, i32* %arrayidx10, align 4
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ret void
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; CHECK-LABEL: @vec_bswap_i32(
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; CHECK: load <4 x i32>
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; CHECK: load <4 x i32>
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; CHECK: call <4 x i32> @llvm.bswap.v4i32
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; CHECK: store <4 x i32>
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; CHECK: ret
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}
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