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[AArch64] Add support for dynamic stack alignment
Differential Revision: http://reviews.llvm.org/D8876 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234471 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Kristof Beyls
parent
64008ef318
commit
2a6ad5bfb2
@ -9,6 +9,82 @@
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//
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// This file contains the AArch64 implementation of TargetFrameLowering class.
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//
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// On AArch64, stack frames are structured as follows:
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//
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// The stack grows downward.
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//
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// All of the individual frame areas on the frame below are optional, i.e. it's
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// possible to create a function so that the particular area isn't present
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// in the frame.
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//
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// At function entry, the "frame" looks as follows:
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//
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// | | Higher address
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// |-----------------------------------|
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// | |
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// | arguments passed on the stack |
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// | |
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// |-----------------------------------| <- sp
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// | | Lower address
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//
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//
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// After the prologue has run, the frame has the following general structure.
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// Note that this doesn't depict the case where a red-zone is used. Also,
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// technically the last frame area (VLAs) doesn't get created until in the
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// main function body, after the prologue is run. However, it's depicted here
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// for completeness.
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//
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// | | Higher address
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// |-----------------------------------|
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// | |
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// | arguments passed on the stack |
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// | |
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// |-----------------------------------|
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// | |
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// | prev_fp, prev_lr |
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// | (a.k.a. "frame record") |
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// |-----------------------------------| <- fp(=x29)
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// | |
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// | other callee-saved registers |
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// | |
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// |-----------------------------------|
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// |.empty.space.to.make.part.below....|
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// |.aligned.in.case.it.needs.more.than| (size of this area is unknown at
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// |.the.standard.16-byte.alignment....| compile time; if present)
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// |-----------------------------------|
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// | |
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// | local variables of fixed size |
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// | including spill slots |
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// |-----------------------------------| <- bp(not defined by ABI,
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// |.variable-sized.local.variables....| LLVM chooses X19)
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// |.(VLAs)............................| (size of this area is unknown at
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// |...................................| compile time)
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// |-----------------------------------| <- sp
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// | | Lower address
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//
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//
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// To access the data in a frame, at-compile time, a constant offset must be
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// computable from one of the pointers (fp, bp, sp) to access it. The size
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// of the areas with a dotted background cannot be computed at compile-time
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// if they are present, making it required to have all three of fp, bp and
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// sp to be set up to be able to access all contents in the frame areas,
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// assuming all of the frame areas are non-empty.
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//
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// For most functions, some of the frame areas are empty. For those functions,
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// it may not be necessary to set up fp or bp:
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// * A base pointer is definitly needed when there are both VLAs and local
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// variables with more-than-default alignment requirements.
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// * A frame pointer is definitly needed when there are local variables with
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// more-than-default alignment requirements.
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//
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// In some cases when a base pointer is not strictly needed, it is generated
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// anyway when offsets from the frame pointer to access local variables become
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// so large that the offset can't be encoded in the immediate fields of loads
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// or stores.
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//
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// FIXME: also explain the redzone concept.
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// FIXME: also explain the concept of reserved call frames.
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//
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//===----------------------------------------------------------------------===//
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#include "AArch64FrameLowering.h"
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@ -39,26 +115,6 @@ static cl::opt<bool> EnableRedZone("aarch64-redzone",
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STATISTIC(NumRedZoneFunctions, "Number of functions using red zone");
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static unsigned estimateStackSize(MachineFunction &MF) {
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const MachineFrameInfo *FFI = MF.getFrameInfo();
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int Offset = 0;
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for (int i = FFI->getObjectIndexBegin(); i != 0; ++i) {
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int FixedOff = -FFI->getObjectOffset(i);
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if (FixedOff > Offset)
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Offset = FixedOff;
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}
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for (unsigned i = 0, e = FFI->getObjectIndexEnd(); i != e; ++i) {
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if (FFI->isDeadObjectIndex(i))
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continue;
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Offset += FFI->getObjectSize(i);
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unsigned Align = FFI->getObjectAlignment(i);
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// Adjust to alignment boundary
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Offset = (Offset + Align - 1) / Align * Align;
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}
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// This does not include the 16 bytes used for fp and lr.
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return (unsigned)Offset;
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}
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bool AArch64FrameLowering::canUseRedZone(const MachineFunction &MF) const {
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if (!EnableRedZone)
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return false;
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@ -83,16 +139,10 @@ bool AArch64FrameLowering::canUseRedZone(const MachineFunction &MF) const {
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/// pointer register.
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bool AArch64FrameLowering::hasFP(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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#ifndef NDEBUG
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const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
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assert(!RegInfo->needsStackRealignment(MF) &&
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"No stack realignment on AArch64!");
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#endif
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return (MFI->hasCalls() || MFI->hasVarSizedObjects() ||
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MFI->isFrameAddressTaken() || MFI->hasStackMap() ||
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MFI->hasPatchPoint());
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MFI->hasPatchPoint() || RegInfo->needsStackRealignment(MF));
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}
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/// hasReservedCallFrame - Under normal circumstances, when a frame pointer is
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@ -288,11 +338,48 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const {
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AFI->setLocalStackSize(NumBytes);
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// Allocate space for the rest of the frame.
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if (NumBytes) {
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// If we're a leaf function, try using the red zone.
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if (!canUseRedZone(MF))
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emitFrameOffset(MBB, MBBI, DL, AArch64::SP, AArch64::SP, -NumBytes, TII,
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MachineInstr::FrameSetup);
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const unsigned Alignment = MFI->getMaxAlignment();
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const bool NeedsRealignment = (Alignment > 16);
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unsigned scratchSPReg = AArch64::SP;
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if (NeedsRealignment) {
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// Use the first callee-saved register as a scratch register
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assert(MF.getRegInfo().isPhysRegUsed(AArch64::X9) &&
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"No scratch register to align SP!");
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scratchSPReg = AArch64::X9;
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}
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// If we're a leaf function, try using the red zone.
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if (NumBytes && !canUseRedZone(MF))
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// FIXME: in the case of dynamic re-alignment, NumBytes doesn't have
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// the correct value here, as NumBytes also includes padding bytes,
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// which shouldn't be counted here.
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emitFrameOffset(MBB, MBBI, DL, scratchSPReg, AArch64::SP, -NumBytes, TII,
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MachineInstr::FrameSetup);
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assert(!(NeedsRealignment && NumBytes==0) &&
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"NumBytes should never be 0 when realignment is needed");
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if (NumBytes && NeedsRealignment) {
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const unsigned NrBitsToZero = countTrailingZeros(Alignment);
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assert(NrBitsToZero > 1);
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assert(scratchSPReg != AArch64::SP);
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// SUB X9, SP, NumBytes
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// -- X9 is temporary register, so shouldn't contain any live data here,
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// -- free to use. This is already produced by emitFrameOffset above.
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// AND SP, X9, 0b11111...0000
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// The logical immediates have a non-trivial encoding. The following
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// formula computes the encoded immediate with all ones but
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// NrBitsToZero zero bits as least significant bits.
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uint32_t andMaskEncoded =
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(1 <<12) // = N
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| ((64-NrBitsToZero) << 6) // immr
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| ((64-NrBitsToZero-1) << 0) // imms
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;
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BuildMI(MBB, MBBI, DL, TII->get(AArch64::ANDXri), AArch64::SP)
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.addReg(scratchSPReg, RegState::Kill)
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.addImm(andMaskEncoded);
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}
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// If we need a base pointer, set it up here. It's whatever the value of the
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@ -302,15 +389,15 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const {
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// FIXME: Clarify FrameSetup flags here.
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// Note: Use emitFrameOffset() like above for FP if the FrameSetup flag is
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// needed.
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//
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if (RegInfo->hasBasePointer(MF))
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TII->copyPhysReg(MBB, MBBI, DL, AArch64::X19, AArch64::SP, false);
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if (RegInfo->hasBasePointer(MF)) {
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TII->copyPhysReg(MBB, MBBI, DL, RegInfo->getBaseRegister(), AArch64::SP,
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false);
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}
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if (needsFrameMoves) {
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const DataLayout *TD = MF.getTarget().getDataLayout();
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const int StackGrowth = -TD->getPointerSize(0);
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unsigned FramePtr = RegInfo->getFrameRegister(MF);
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// An example of the prologue:
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//
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// .globl __foo
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@ -460,7 +547,7 @@ void AArch64FrameLowering::emitEpilogue(MachineFunction &MF,
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if (MF.getFunction()->getCallingConv() == CallingConv::GHC)
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return;
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// Initial and residual are named for consitency with the prologue. Note that
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// Initial and residual are named for consistency with the prologue. Note that
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// in the epilogue, the residual adjustment is executed first.
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uint64_t ArgumentPopSize = 0;
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if (RetOpcode == AArch64::TCRETURNdi || RetOpcode == AArch64::TCRETURNri) {
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@ -571,9 +658,9 @@ int AArch64FrameLowering::resolveFrameIndexReference(const MachineFunction &MF,
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bool isFixed = MFI->isFixedObjectIndex(FI);
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// Use frame pointer to reference fixed objects. Use it for locals if
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// there are VLAs (and thus the SP isn't reliable as a base).
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// Make sure useFPForScavengingIndex() does the right thing for the emergency
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// spill slot.
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// there are VLAs or a dynamically realigned SP (and thus the SP isn't
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// reliable as a base). Make sure useFPForScavengingIndex() does the
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// right thing for the emergency spill slot.
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bool UseFP = false;
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if (AFI->hasStackFrame()) {
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// Note: Keeping the following as multiple 'if' statements rather than
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@ -582,7 +669,8 @@ int AArch64FrameLowering::resolveFrameIndexReference(const MachineFunction &MF,
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// Argument access should always use the FP.
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if (isFixed) {
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UseFP = hasFP(MF);
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} else if (hasFP(MF) && !RegInfo->hasBasePointer(MF)) {
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} else if (hasFP(MF) && !RegInfo->hasBasePointer(MF) &&
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!RegInfo->needsStackRealignment(MF)) {
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// Use SP or FP, whichever gives us the best chance of the offset
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// being in range for direct access. If the FPOffset is positive,
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// that'll always be best, as the SP will be even further away.
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@ -598,6 +686,10 @@ int AArch64FrameLowering::resolveFrameIndexReference(const MachineFunction &MF,
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}
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}
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assert((isFixed || !RegInfo->needsStackRealignment(MF) || !UseFP) &&
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"In the presence of dynamic stack pointer realignment, "
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"non-argument objects cannot be accessed through the frame pointer");
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if (UseFP) {
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FrameReg = RegInfo->getFrameRegister(MF);
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return FPOffset;
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@ -794,6 +886,9 @@ void AArch64FrameLowering::processFunctionBeforeCalleeSavedScan(
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if (RegInfo->hasBasePointer(MF))
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MRI->setPhysRegUsed(RegInfo->getBaseRegister());
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if (RegInfo->needsStackRealignment(MF) && !RegInfo->hasBasePointer(MF))
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MRI->setPhysRegUsed(AArch64::X9);
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// If any callee-saved registers are used, the frame cannot be eliminated.
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unsigned NumGPRSpilled = 0;
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unsigned NumFPRSpilled = 0;
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@ -867,7 +962,8 @@ void AArch64FrameLowering::processFunctionBeforeCalleeSavedScan(
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// The CSR spill slots have not been allocated yet, so estimateStackSize
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// won't include them.
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MachineFrameInfo *MFI = MF.getFrameInfo();
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unsigned CFSize = estimateStackSize(MF) + 8 * (NumGPRSpilled + NumFPRSpilled);
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unsigned CFSize =
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MFI->estimateStackSize(MF) + 8 * (NumGPRSpilled + NumFPRSpilled);
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DEBUG(dbgs() << "Estimated stack frame size: " << CFSize << " bytes.\n");
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bool BigStack = (CFSize >= 256);
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if (BigStack || !CanEliminateFrame || RegInfo->cannotEliminateFrame(MF))
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@ -22,7 +22,7 @@ class AArch64FrameLowering : public TargetFrameLowering {
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public:
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explicit AArch64FrameLowering()
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: TargetFrameLowering(StackGrowsDown, 16, 0, 16,
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false /*StackRealignable*/) {}
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true /*StackRealignable*/) {}
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void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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@ -165,7 +165,12 @@ bool AArch64RegisterInfo::hasBasePointer(const MachineFunction &MF) const {
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// large enough that referencing from the FP won't result in things being
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// in range relatively often, we can use a base pointer to allow access
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// from the other direction like the SP normally works.
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// Furthermore, if both variable sized objects are present, and the
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// stack needs to be dynamically re-aligned, the base pointer is the only
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// reliable way to reference the locals.
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if (MFI->hasVarSizedObjects()) {
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if (needsStackRealignment(MF))
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return true;
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// Conservatively estimate whether the negative offset from the frame
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// pointer will be sufficient to reach. If a function has a smallish
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// frame, it's less likely to have lots of spills and callee saved
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@ -181,6 +186,31 @@ bool AArch64RegisterInfo::hasBasePointer(const MachineFunction &MF) const {
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return false;
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}
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bool AArch64RegisterInfo::canRealignStack(const MachineFunction &MF) const {
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if (MF.getFunction()->hasFnAttribute("no-realign-stack"))
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return false;
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return true;
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}
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// FIXME: share this with other backends with identical implementation?
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bool
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AArch64RegisterInfo::needsStackRealignment(const MachineFunction &MF) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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const Function *F = MF.getFunction();
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unsigned StackAlign = MF.getTarget()
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.getSubtargetImpl(*MF.getFunction())
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->getFrameLowering()
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->getStackAlignment();
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bool requiresRealignment =
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((MFI->getMaxAlignment() > StackAlign) ||
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F->getAttributes().hasAttribute(AttributeSet::FunctionIndex,
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Attribute::StackAlignment));
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return requiresRealignment && canRealignStack(MF);
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}
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unsigned
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AArch64RegisterInfo::getFrameRegister(const MachineFunction &MF) const {
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const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
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@ -93,6 +93,9 @@ public:
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unsigned getRegPressureLimit(const TargetRegisterClass *RC,
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MachineFunction &MF) const override;
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// Base pointer (stack realignment) support.
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bool canRealignStack(const MachineFunction &MF) const;
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bool needsStackRealignment(const MachineFunction &MF) const override;
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};
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} // end namespace llvm
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491
test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll
Normal file
491
test/CodeGen/AArch64/aarch64-dynamic-stack-layout.ll
Normal file
@ -0,0 +1,491 @@
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; RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s
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; This test aims to check basic correctness of frame layout &
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; frame access code. There are 8 functions in this test file,
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; each function implements one element in the cartesian product
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; of:
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; . a function having a VLA/noVLA
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; . a function with dynamic stack realignment/no dynamic stack realignment.
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; . a function needing a frame pionter/no frame pointer,
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; since the presence/absence of these has influence on the frame
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; layout and which pointer to use to access various part of the
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; frame (bp,sp,fp).
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;
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; Furthermore: in every test function:
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; . there is always one integer and 1 floating point argument to be able
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; to check those are accessed correctly.
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; . there is always one local variable to check that is accessed
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; correctly
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;
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; The LLVM-IR below was produced by clang on the following C++ code:
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;extern "C" int g();
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;extern "C" int novla_nodynamicrealign_call(int i1, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, int i10,
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; double d1, double d2, double d3, double d4, double d5, double d6, double d7, double d8, double d9, double d10)
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;{
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; // use an argument passed on the stack.
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; volatile int l1;
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; return i10 + (int)d10 + l1 + g();
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;}
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;extern "C" int novla_nodynamicrealign_nocall(int i1, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, int i10,
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; double d1, double d2, double d3, double d4, double d5, double d6, double d7, double d8, double d9, double d10)
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;{
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; // use an argument passed on the stack.
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; volatile int l1;
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; return i10 + (int)d10 + l1;
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;}
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;extern "C" int novla_dynamicrealign_call(int i1, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, int i10,
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; double d1, double d2, double d3, double d4, double d5, double d6, double d7, double d8, double d9, double d10)
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;{
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; // use an argument passed on the stack.
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; alignas(128) volatile int l1;
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; return i10 + (int)d10 + l1 + g();
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;}
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;extern "C" int novla_dynamicrealign_nocall(int i1, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, int i10,
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; double d1, double d2, double d3, double d4, double d5, double d6, double d7, double d8, double d9, double d10)
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;{
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; // use an argument passed on the stack.
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; alignas(128) volatile int l1;
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; return i10 + (int)d10 + l1;
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;}
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;
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;extern "C" int vla_nodynamicrealign_call(int i1, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, int i10,
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; double d1, double d2, double d3, double d4, double d5, double d6, double d7, double d8, double d9, double d10)
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;{
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; // use an argument passed on the stack.
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; volatile int l1;
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; volatile int vla[i1];
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; return i10 + (int)d10 + l1 + g() + vla[0];
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;}
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;extern "C" int vla_nodynamicrealign_nocall(int i1, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, int i10,
|
||||
; double d1, double d2, double d3, double d4, double d5, double d6, double d7, double d8, double d9, double d10)
|
||||
;{
|
||||
; // use an argument passed on the stack.
|
||||
; volatile int l1;
|
||||
; volatile int vla[i1];
|
||||
; return i10 + (int)d10 + l1 + vla[0];
|
||||
;}
|
||||
;extern "C" int vla_dynamicrealign_call(int i1, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, int i10,
|
||||
; double d1, double d2, double d3, double d4, double d5, double d6, double d7, double d8, double d9, double d10)
|
||||
;{
|
||||
; // use an argument passed on the stack.
|
||||
; alignas(128) volatile int l1;
|
||||
; volatile int vla[i1];
|
||||
; return i10 + (int)d10 + l1 + g() + vla[0];
|
||||
;}
|
||||
;extern "C" int vla_dynamicrealign_nocall(int i1, int i2, int i3, int i4, int i5, int i6, int i7, int i8, int i9, int i10,
|
||||
; double d1, double d2, double d3, double d4, double d5, double d6, double d7, double d8, double d9, double d10)
|
||||
;{
|
||||
; // use an argument passed on the stack.
|
||||
; alignas(128) volatile int l1;
|
||||
; volatile int vla[i1];
|
||||
; return i10 + (int)d10 + l1 + vla[0];
|
||||
;}
|
||||
|
||||
|
||||
|
||||
define i32 @novla_nodynamicrealign_call(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i32 %i10, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10) #0 {
|
||||
entry:
|
||||
%l1 = alloca i32, align 4
|
||||
%conv = fptosi double %d10 to i32
|
||||
%add = add nsw i32 %conv, %i10
|
||||
%l1.0.l1.0. = load volatile i32, i32* %l1, align 4
|
||||
%add1 = add nsw i32 %add, %l1.0.l1.0.
|
||||
%call = tail call i32 @g()
|
||||
%add2 = add nsw i32 %add1, %call
|
||||
ret i32 %add2
|
||||
}
|
||||
; CHECK-LABEL: novla_nodynamicrealign_call
|
||||
; CHECK: .cfi_startproc
|
||||
; Check that used callee-saved registers are saved
|
||||
; CHECK: stp x20, x19, [sp, #-32]!
|
||||
; Check that the frame pointer is created:
|
||||
; CHECK: stp x29, x30, [sp, #16]
|
||||
; CHECK: add x29, sp, #16
|
||||
; Check correctness of cfi pseudo-instructions
|
||||
; CHECK: .cfi_def_cfa w29, 16
|
||||
; CHECK: .cfi_offset w30, -8
|
||||
; CHECK: .cfi_offset w29, -16
|
||||
; CHECK: .cfi_offset w19, -24
|
||||
; CHECK: .cfi_offset w20, -32
|
||||
; Check correct access to arguments passed on the stack, through frame pointer
|
||||
; CHECK: ldr d[[DARG:[0-9]+]], [x29, #40]
|
||||
; CHECK: ldr w[[IARG:[0-9]+]], [x29, #24]
|
||||
; Check correct access to local variable on the stack, through stack pointer
|
||||
; CHECK: ldr w[[ILOC:[0-9]+]], [sp, #12]
|
||||
; Check epilogue:
|
||||
; CHECK: ldp x29, x30, [sp, #16]
|
||||
; CHECK: ldp x20, x19, [sp], #32
|
||||
; CHECK: ret
|
||||
; CHECK: .cfi_endproc
|
||||
|
||||
|
||||
declare i32 @g() #0
|
||||
|
||||
; Function Attrs: nounwind
|
||||
define i32 @novla_nodynamicrealign_nocall(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i32 %i10, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10) #1 {
|
||||
entry:
|
||||
%l1 = alloca i32, align 4
|
||||
%conv = fptosi double %d10 to i32
|
||||
%add = add nsw i32 %conv, %i10
|
||||
%l1.0.l1.0. = load volatile i32, i32* %l1, align 4
|
||||
%add1 = add nsw i32 %add, %l1.0.l1.0.
|
||||
ret i32 %add1
|
||||
}
|
||||
; CHECK-LABEL: novla_nodynamicrealign_nocall
|
||||
; Check that space is reserved for one local variable on the stack.
|
||||
; CHECK: sub sp, sp, #16 // =16
|
||||
; Check correct access to arguments passed on the stack, through stack pointer
|
||||
; CHECK: ldr d[[DARG:[0-9]+]], [sp, #40]
|
||||
; CHECK: ldr w[[IARG:[0-9]+]], [sp, #24]
|
||||
; Check correct access to local variable on the stack, through stack pointer
|
||||
; CHECK: ldr w[[ILOC:[0-9]+]], [sp, #12]
|
||||
; Check epilogue:
|
||||
; CHECK: add sp, sp, #16 // =16
|
||||
; CHECK: ret
|
||||
|
||||
|
||||
define i32 @novla_dynamicrealign_call(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i32 %i10, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10) #0 {
|
||||
entry:
|
||||
%l1 = alloca i32, align 128
|
||||
%conv = fptosi double %d10 to i32
|
||||
%add = add nsw i32 %conv, %i10
|
||||
%l1.0.l1.0. = load volatile i32, i32* %l1, align 128
|
||||
%add1 = add nsw i32 %add, %l1.0.l1.0.
|
||||
%call = tail call i32 @g()
|
||||
%add2 = add nsw i32 %add1, %call
|
||||
ret i32 %add2
|
||||
}
|
||||
|
||||
; CHECK-LABEL: novla_dynamicrealign_call
|
||||
; CHECK: .cfi_startproc
|
||||
; Check that used callee-saved registers are saved
|
||||
; CHECK: stp x20, x19, [sp, #-32]!
|
||||
; Check that the frame pointer is created:
|
||||
; CHECK: stp x29, x30, [sp, #16]
|
||||
; CHECK: add x29, sp, #16
|
||||
; Check the dynamic realignment of the stack pointer to a 128-byte boundary
|
||||
; CHECK: sub x9, sp, #96
|
||||
; CHECK: and sp, x9, #0xffffffffffffff80
|
||||
; Check correctness of cfi pseudo-instructions
|
||||
; CHECK: .cfi_def_cfa w29, 16
|
||||
; CHECK: .cfi_offset w30, -8
|
||||
; CHECK: .cfi_offset w29, -16
|
||||
; CHECK: .cfi_offset w19, -24
|
||||
; CHECK: .cfi_offset w20, -32
|
||||
; Check correct access to arguments passed on the stack, through frame pointer
|
||||
; CHECK: ldr d[[DARG:[0-9]+]], [x29, #40]
|
||||
; CHECK: ldr w[[IARG:[0-9]+]], [x29, #24]
|
||||
; Check correct access to local variable on the stack, through re-aligned stack pointer
|
||||
; CHECK: ldr w[[ILOC:[0-9]+]], [sp]
|
||||
; Check epilogue:
|
||||
; Check that stack pointer get restored from frame pointer.
|
||||
; CHECK: sub sp, x29, #16 // =16
|
||||
; CHECK: ldp x29, x30, [sp, #16]
|
||||
; CHECK: ldp x20, x19, [sp], #32
|
||||
; CHECK: ret
|
||||
; CHECK: .cfi_endproc
|
||||
|
||||
|
||||
; Function Attrs: nounwind
|
||||
define i32 @novla_dynamicrealign_nocall(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i32 %i10, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10) #1 {
|
||||
entry:
|
||||
%l1 = alloca i32, align 128
|
||||
%conv = fptosi double %d10 to i32
|
||||
%add = add nsw i32 %conv, %i10
|
||||
%l1.0.l1.0. = load volatile i32, i32* %l1, align 128
|
||||
%add1 = add nsw i32 %add, %l1.0.l1.0.
|
||||
ret i32 %add1
|
||||
}
|
||||
|
||||
; CHECK-LABEL: novla_dynamicrealign_nocall
|
||||
; Check that the frame pointer is created:
|
||||
; CHECK: stp x29, x30, [sp, #-16]!
|
||||
; CHECK: mov x29, sp
|
||||
; Check the dynamic realignment of the stack pointer to a 128-byte boundary
|
||||
; CHECK: sub x9, sp, #112
|
||||
; CHECK: and sp, x9, #0xffffffffffffff80
|
||||
; Check correct access to arguments passed on the stack, through frame pointer
|
||||
; CHECK: ldr d[[DARG:[0-9]+]], [x29, #40]
|
||||
; CHECK: ldr w[[IARG:[0-9]+]], [x29, #24]
|
||||
; Check correct access to local variable on the stack, through re-aligned stack pointer
|
||||
; CHECK: ldr w[[ILOC:[0-9]+]], [sp]
|
||||
; Check epilogue:
|
||||
; Check that stack pointer get restored from frame pointer.
|
||||
; CHECK: mov sp, x29
|
||||
; CHECK: ldp x29, x30, [sp], #16
|
||||
; CHECK: ret
|
||||
|
||||
|
||||
define i32 @vla_nodynamicrealign_call(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i32 %i10, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10) #0 {
|
||||
entry:
|
||||
%l1 = alloca i32, align 4
|
||||
%0 = zext i32 %i1 to i64
|
||||
%vla = alloca i32, i64 %0, align 4
|
||||
%conv = fptosi double %d10 to i32
|
||||
%add = add nsw i32 %conv, %i10
|
||||
%l1.0.l1.0. = load volatile i32, i32* %l1, align 4
|
||||
%add1 = add nsw i32 %add, %l1.0.l1.0.
|
||||
%call = tail call i32 @g()
|
||||
%add2 = add nsw i32 %add1, %call
|
||||
%1 = load volatile i32, i32* %vla, align 4, !tbaa !1
|
||||
%add3 = add nsw i32 %add2, %1
|
||||
ret i32 %add3
|
||||
}
|
||||
|
||||
; CHECK-LABEL: vla_nodynamicrealign_call
|
||||
; CHECK: .cfi_startproc
|
||||
; Check that used callee-saved registers are saved
|
||||
; CHECK: stp x20, x19, [sp, #-32]!
|
||||
; Check that the frame pointer is created:
|
||||
; CHECK: stp x29, x30, [sp, #16]
|
||||
; CHECK: add x29, sp, #16
|
||||
; Check that space is reserved on the stack for the local variable,
|
||||
; rounded up to a multiple of 16 to keep the stack pointer 16-byte aligned.
|
||||
; CHECK: sub sp, sp, #16
|
||||
; Check correctness of cfi pseudo-instructions
|
||||
; CHECK: .cfi_def_cfa w29, 16
|
||||
; CHECK: .cfi_offset w30, -8
|
||||
; CHECK: .cfi_offset w29, -16
|
||||
; CHECK: .cfi_offset w19, -24
|
||||
; CHECK: .cfi_offset w20, -32
|
||||
; Check correct access to arguments passed on the stack, through frame pointer
|
||||
; CHECK: ldr w[[IARG:[0-9]+]], [x29, #24]
|
||||
; CHECK: ldr d[[DARG:[0-9]+]], [x29, #40]
|
||||
; Check correct reservation of 16-byte aligned VLA (size in w0) on stack
|
||||
; CHECK: ubfx x9, x0, #0, #32
|
||||
; CHECK: lsl x9, x9, #2
|
||||
; CHECK: add x9, x9, #15
|
||||
; CHECK: and x9, x9, #0xfffffffffffffff0
|
||||
; CHECK: mov x10, sp
|
||||
; CHECK: sub x[[VLASPTMP:[0-9]+]], x10, x9
|
||||
; CHECK: mov sp, x[[VLASPTMP]]
|
||||
; Check correct access to local variable, through frame pointer
|
||||
; CHECK: ldur w[[ILOC:[0-9]+]], [x29, #-20]
|
||||
; Check correct accessing of the VLA variable through the base pointer
|
||||
; CHECK: ldr w[[VLA:[0-9]+]], [x[[VLASPTMP]]]
|
||||
; Check epilogue:
|
||||
; Check that stack pointer get restored from frame pointer.
|
||||
; CHECK: sub sp, x29, #16 // =16
|
||||
; CHECK: ldp x29, x30, [sp, #16]
|
||||
; CHECK: ldp x20, x19, [sp], #32
|
||||
; CHECK: ret
|
||||
; CHECK: .cfi_endproc
|
||||
|
||||
|
||||
; Function Attrs: nounwind
|
||||
define i32 @vla_nodynamicrealign_nocall(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i32 %i10, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10) #1 {
|
||||
entry:
|
||||
%l1 = alloca i32, align 4
|
||||
%0 = zext i32 %i1 to i64
|
||||
%vla = alloca i32, i64 %0, align 4
|
||||
%conv = fptosi double %d10 to i32
|
||||
%add = add nsw i32 %conv, %i10
|
||||
%l1.0.l1.0. = load volatile i32, i32* %l1, align 4
|
||||
%add1 = add nsw i32 %add, %l1.0.l1.0.
|
||||
%1 = load volatile i32, i32* %vla, align 4, !tbaa !1
|
||||
%add2 = add nsw i32 %add1, %1
|
||||
ret i32 %add2
|
||||
}
|
||||
|
||||
; CHECK-LABEL: vla_nodynamicrealign_nocall
|
||||
; Check that the frame pointer is created:
|
||||
; CHECK: stp x29, x30, [sp, #-16]!
|
||||
; CHECK: mov x29, sp
|
||||
; Check that space is reserved on the stack for the local variable,
|
||||
; rounded up to a multiple of 16 to keep the stack pointer 16-byte aligned.
|
||||
; CHECK: sub sp, sp, #16
|
||||
; Check correctness of cfi pseudo-instructions
|
||||
; Check correct access to arguments passed on the stack, through frame pointer
|
||||
; CHECK: ldr w[[IARG:[0-9]+]], [x29, #24]
|
||||
; CHECK: ldr d[[DARG:[0-9]+]], [x29, #40]
|
||||
; Check correct reservation of 16-byte aligned VLA (size in w0) on stack
|
||||
; CHECK: ubfx x9, x0, #0, #32
|
||||
; CHECK: lsl x9, x9, #2
|
||||
; CHECK: add x9, x9, #15
|
||||
; CHECK: and x9, x9, #0xfffffffffffffff0
|
||||
; CHECK: mov x10, sp
|
||||
; CHECK: sub x[[VLASPTMP:[0-9]+]], x10, x9
|
||||
; CHECK: mov sp, x[[VLASPTMP]]
|
||||
; Check correct access to local variable, through frame pointer
|
||||
; CHECK: ldur w[[ILOC:[0-9]+]], [x29, #-4]
|
||||
; Check correct accessing of the VLA variable through the base pointer
|
||||
; CHECK: ldr w[[VLA:[0-9]+]], [x[[VLASPTMP]]]
|
||||
; Check epilogue:
|
||||
; Check that stack pointer get restored from frame pointer.
|
||||
; CHECK: mov sp, x29
|
||||
; CHECK: ldp x29, x30, [sp], #16
|
||||
; CHECK: ret
|
||||
|
||||
|
||||
define i32 @vla_dynamicrealign_call(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i32 %i10, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10) #0 {
|
||||
entry:
|
||||
%l1 = alloca i32, align 128
|
||||
%0 = zext i32 %i1 to i64
|
||||
%vla = alloca i32, i64 %0, align 4
|
||||
%conv = fptosi double %d10 to i32
|
||||
%add = add nsw i32 %conv, %i10
|
||||
%l1.0.l1.0. = load volatile i32, i32* %l1, align 128
|
||||
%add1 = add nsw i32 %add, %l1.0.l1.0.
|
||||
%call = tail call i32 @g()
|
||||
%add2 = add nsw i32 %add1, %call
|
||||
%1 = load volatile i32, i32* %vla, align 4, !tbaa !1
|
||||
%add3 = add nsw i32 %add2, %1
|
||||
ret i32 %add3
|
||||
}
|
||||
|
||||
; CHECK-LABEL: vla_dynamicrealign_call
|
||||
; CHECK: .cfi_startproc
|
||||
; Check that used callee-saved registers are saved
|
||||
; CHECK: stp x22, x21, [sp, #-48]!
|
||||
; CHECK: stp x20, x19, [sp, #16]
|
||||
; Check that the frame pointer is created:
|
||||
; CHECK: stp x29, x30, [sp, #32]
|
||||
; CHECK: add x29, sp, #32
|
||||
; Check that the stack pointer gets re-aligned to 128
|
||||
; bytes & the base pointer (x19) gets initialized to
|
||||
; this 128-byte aligned area for local variables &
|
||||
; spill slots
|
||||
; CHECK: sub x9, sp, #80 // =80
|
||||
; CHECK: and sp, x9, #0xffffffffffffff80
|
||||
; CHECK: mov x19, sp
|
||||
; Check correctness of cfi pseudo-instructions
|
||||
; CHECK: .cfi_def_cfa w29, 16
|
||||
; CHECK: .cfi_offset w30, -8
|
||||
; CHECK: .cfi_offset w29, -16
|
||||
; CHECK: .cfi_offset w19, -24
|
||||
; CHECK: .cfi_offset w20, -32
|
||||
; CHECK: .cfi_offset w21, -40
|
||||
; CHECK: .cfi_offset w22, -48
|
||||
; Check correct access to arguments passed on the stack, through frame pointer
|
||||
; CHECK: ldr w[[IARG:[0-9]+]], [x29, #24]
|
||||
; CHECK: ldr d[[DARG:[0-9]+]], [x29, #40]
|
||||
; Check correct reservation of 16-byte aligned VLA (size in w0) on stack
|
||||
; and set-up of base pointer (x19).
|
||||
; CHECK: ubfx x9, x0, #0, #32
|
||||
; CHECK: lsl x9, x9, #2
|
||||
; CHECK: add x9, x9, #15
|
||||
; CHECK: and x9, x9, #0xfffffffffffffff0
|
||||
; CHECK: mov x10, sp
|
||||
; CHECK: sub x[[VLASPTMP:[0-9]+]], x10, x9
|
||||
; CHECK: mov sp, x[[VLASPTMP]]
|
||||
; Check correct access to local variable, through base pointer
|
||||
; CHECK: ldr w[[ILOC:[0-9]+]], [x19]
|
||||
; CHECK: ldr w[[VLA:[0-9]+]], [x[[VLASPTMP]]]
|
||||
; Check epilogue:
|
||||
; Check that stack pointer get restored from frame pointer.
|
||||
; CHECK: sub sp, x29, #32
|
||||
; CHECK: ldp x29, x30, [sp, #32]
|
||||
; CHECK: ldp x20, x19, [sp, #16]
|
||||
; CHECK: ldp x22, x21, [sp], #48
|
||||
; CHECK: ret
|
||||
; CHECK: .cfi_endproc
|
||||
|
||||
|
||||
; Function Attrs: nounwind
|
||||
define i32 @vla_dynamicrealign_nocall(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i32 %i10, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10) #1 {
|
||||
entry:
|
||||
%l1 = alloca i32, align 128
|
||||
%0 = zext i32 %i1 to i64
|
||||
%vla = alloca i32, i64 %0, align 4
|
||||
%conv = fptosi double %d10 to i32
|
||||
%add = add nsw i32 %conv, %i10
|
||||
%l1.0.l1.0. = load volatile i32, i32* %l1, align 128
|
||||
%add1 = add nsw i32 %add, %l1.0.l1.0.
|
||||
%1 = load volatile i32, i32* %vla, align 4, !tbaa !1
|
||||
%add2 = add nsw i32 %add1, %1
|
||||
ret i32 %add2
|
||||
}
|
||||
|
||||
; CHECK-LABEL: vla_dynamicrealign_nocall
|
||||
; Check that used callee-saved registers are saved
|
||||
; CHECK: stp x20, x19, [sp, #-32]!
|
||||
; Check that the frame pointer is created:
|
||||
; CHECK: stp x29, x30, [sp, #16]
|
||||
; CHECK: add x29, sp, #16
|
||||
; Check that the stack pointer gets re-aligned to 128
|
||||
; bytes & the base pointer (x19) gets initialized to
|
||||
; this 128-byte aligned area for local variables &
|
||||
; spill slots
|
||||
; CHECK: sub x9, sp, #96
|
||||
; CHECK: and sp, x9, #0xffffffffffffff80
|
||||
; CHECK: mov x19, sp
|
||||
; Check correct access to arguments passed on the stack, through frame pointer
|
||||
; CHECK: ldr w[[IARG:[0-9]+]], [x29, #24]
|
||||
; CHECK: ldr d[[DARG:[0-9]+]], [x29, #40]
|
||||
; Check correct reservation of 16-byte aligned VLA (size in w0) on stack
|
||||
; and set-up of base pointer (x19).
|
||||
; CHECK: ubfx x9, x0, #0, #32
|
||||
; CHECK: lsl x9, x9, #2
|
||||
; CHECK: add x9, x9, #15
|
||||
; CHECK: and x9, x9, #0xfffffffffffffff0
|
||||
; CHECK: mov x10, sp
|
||||
; CHECK: sub x[[VLASPTMP:[0-9]+]], x10, x9
|
||||
; CHECK: mov sp, x[[VLASPTMP]]
|
||||
; Check correct access to local variable, through base pointer
|
||||
; CHECK: ldr w[[ILOC:[0-9]+]], [x19]
|
||||
; CHECK: ldr w[[VLA:[0-9]+]], [x[[VLASPTMP]]]
|
||||
; Check epilogue:
|
||||
; Check that stack pointer get restored from frame pointer.
|
||||
; CHECK: sub sp, x29, #16
|
||||
; CHECK: ldp x29, x30, [sp, #16]
|
||||
; CHECK: ldp x20, x19, [sp], #32
|
||||
; CHECK: ret
|
||||
|
||||
|
||||
; Function Attrs: nounwind
|
||||
define i32 @vla_dynamicrealign_nocall_large_align(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i32 %i10, double %d1, double %d2, double %d3, double %d4, double %d5, double %d6, double %d7, double %d8, double %d9, double %d10) #1 {
|
||||
entry:
|
||||
%l1 = alloca i32, align 32768
|
||||
%0 = zext i32 %i1 to i64
|
||||
%vla = alloca i32, i64 %0, align 4
|
||||
%conv = fptosi double %d10 to i32
|
||||
%add = add nsw i32 %conv, %i10
|
||||
%l1.0.l1.0. = load volatile i32, i32* %l1, align 32768
|
||||
%add1 = add nsw i32 %add, %l1.0.l1.0.
|
||||
%1 = load volatile i32, i32* %vla, align 4, !tbaa !1
|
||||
%add2 = add nsw i32 %add1, %1
|
||||
ret i32 %add2
|
||||
}
|
||||
|
||||
; CHECK-LABEL: vla_dynamicrealign_nocall_large_align
|
||||
; Check that used callee-saved registers are saved
|
||||
; CHECK: stp x20, x19, [sp, #-32]!
|
||||
; Check that the frame pointer is created:
|
||||
; CHECK: stp x29, x30, [sp, #16]
|
||||
; CHECK: add x29, sp, #16
|
||||
; Check that the stack pointer gets re-aligned to 128
|
||||
; bytes & the base pointer (x19) gets initialized to
|
||||
; this 128-byte aligned area for local variables &
|
||||
; spill slots
|
||||
; CHECK: sub x9, sp, #7, lsl #12
|
||||
; CHECK: and sp, x9, #0xffffffffffff8000
|
||||
; CHECK: mov x19, sp
|
||||
; Check correct access to arguments passed on the stack, through frame pointer
|
||||
; CHECK: ldr w[[IARG:[0-9]+]], [x29, #24]
|
||||
; CHECK: ldr d[[DARG:[0-9]+]], [x29, #40]
|
||||
; Check correct reservation of 16-byte aligned VLA (size in w0) on stack
|
||||
; and set-up of base pointer (x19).
|
||||
; CHECK: ubfx x9, x0, #0, #32
|
||||
; CHECK: lsl x9, x9, #2
|
||||
; CHECK: add x9, x9, #15
|
||||
; CHECK: and x9, x9, #0xfffffffffffffff0
|
||||
; CHECK: mov x10, sp
|
||||
; CHECK: sub x[[VLASPTMP:[0-9]+]], x10, x9
|
||||
; CHECK: mov sp, x[[VLASPTMP]]
|
||||
; Check correct access to local variable, through base pointer
|
||||
; CHECK: ldr w[[ILOC:[0-9]+]], [x19]
|
||||
; CHECK: ldr w[[VLA:[0-9]+]], [x[[VLASPTMP]]]
|
||||
; Check epilogue:
|
||||
; Check that stack pointer get restored from frame pointer.
|
||||
; CHECK: sub sp, x29, #16
|
||||
; CHECK: ldp x29, x30, [sp, #16]
|
||||
; CHECK: ldp x20, x19, [sp], #32
|
||||
; CHECK: ret
|
||||
|
||||
attributes #0 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
|
||||
attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
|
||||
|
||||
!1 = !{!2, !2, i64 0}
|
||||
!2 = !{!"int", !3, i64 0}
|
||||
!3 = !{!"omnipotent char", !4, i64 0}
|
||||
!4 = !{!"Simple C/C++ TBAA"}
|
||||
Loading…
Reference in New Issue
Block a user