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Re-apply 105308 with fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105502 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -30,9 +30,7 @@ using namespace llvm;
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STATISTIC(NumCoalesces, "Number of copies coalesced");
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STATISTIC(NumCSEs, "Number of common subexpression eliminated");
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static cl::opt<bool> CSEPhysDef("machine-cse-phys-defs",
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cl::init(false), cl::Hidden);
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STATISTIC(NumPhysCSEs, "Number of phyreg defining common subexpr eliminated");
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namespace {
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class MachineCSE : public MachineFunctionPass {
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@ -172,7 +170,8 @@ MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
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/// hasLivePhysRegDefUse - Return true if the specified instruction read / write
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/// physical registers (except for dead defs of physical registers). It also
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/// returns the physical register def by reference if it's the only one.
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/// returns the physical register def by reference if it's the only one and the
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/// instruction does not uses a physical register.
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bool MachineCSE::hasLivePhysRegDefUse(const MachineInstr *MI,
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const MachineBasicBlock *MBB,
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unsigned &PhysDef) const {
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@ -186,9 +185,11 @@ bool MachineCSE::hasLivePhysRegDefUse(const MachineInstr *MI,
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continue;
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if (TargetRegisterInfo::isVirtualRegister(Reg))
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continue;
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if (MO.isUse())
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if (MO.isUse()) {
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// Can't touch anything to read a physical register.
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PhysDef = 0;
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return true;
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}
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if (MO.isDead())
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// If the def is dead, it's ok.
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continue;
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@ -356,6 +357,7 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
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if (!isCSECandidate(MI))
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continue;
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bool DefPhys = false;
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bool FoundCSE = VNT.count(MI);
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if (!FoundCSE) {
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// Look for trivial copy coalescing opportunities.
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@ -376,11 +378,13 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
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// ... Unless the CS is local and it also defines the physical register
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// which is not clobbered in between.
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if (PhysDef && CSEPhysDef) {
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if (PhysDef) {
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unsigned CSVN = VNT.lookup(MI);
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MachineInstr *CSMI = Exps[CSVN];
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if (PhysRegDefReaches(CSMI, MI, PhysDef))
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if (PhysRegDefReaches(CSMI, MI, PhysDef)) {
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FoundCSE = true;
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DefPhys = true;
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}
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}
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}
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@ -426,6 +430,8 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
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}
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MI->eraseFromParent();
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++NumCSEs;
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if (DefPhys)
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++NumPhysCSEs;
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} else {
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DEBUG(dbgs() << "*** Not profitable, avoid CSE!\n");
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VNT.insert(MI, CurrVN++);
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18
test/CodeGen/ARM/machine-cse-cmp.ll
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18
test/CodeGen/ARM/machine-cse-cmp.ll
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@ -0,0 +1,18 @@
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; RUN: llc < %s -march=arm | FileCheck %s
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;rdar://8003725
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@G1 = external global i32
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@G2 = external global i32
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define i32 @f1(i32 %cond1, i32 %x1, i32 %x2, i32 %x3) {
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entry:
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; CHECK: cmp
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; CHECK: moveq
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; CHECK-NOT: cmp
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; CHECK: moveq
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%tmp1 = icmp eq i32 %cond1, 0
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%tmp2 = select i1 %tmp1, i32 %x1, i32 %x2
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%tmp3 = select i1 %tmp1, i32 %x2, i32 %x3
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%tmp4 = add i32 %tmp2, %tmp3
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ret i32 %tmp4
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}
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