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Re-apply 105308 with fix.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105502 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2010-06-04 23:28:13 +00:00
parent a15ec5dfcc
commit 2b4e727c6f
2 changed files with 31 additions and 7 deletions
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20
lib/CodeGen/MachineCSE.cpp
View File

@ -30,9 +30,7 @@ using namespace llvm;
STATISTIC(NumCoalesces, "Number of copies coalesced");
STATISTIC(NumCSEs, "Number of common subexpression eliminated");
static cl::opt<bool> CSEPhysDef("machine-cse-phys-defs",
cl::init(false), cl::Hidden);
STATISTIC(NumPhysCSEs, "Number of phyreg defining common subexpr eliminated");
namespace {
class MachineCSE : public MachineFunctionPass {
@ -172,7 +170,8 @@ MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
/// hasLivePhysRegDefUse - Return true if the specified instruction read / write
/// physical registers (except for dead defs of physical registers). It also
/// returns the physical register def by reference if it's the only one.
/// returns the physical register def by reference if it's the only one and the
/// instruction does not uses a physical register.
bool MachineCSE::hasLivePhysRegDefUse(const MachineInstr *MI,
const MachineBasicBlock *MBB,
unsigned &PhysDef) const {
@ -186,9 +185,11 @@ bool MachineCSE::hasLivePhysRegDefUse(const MachineInstr *MI,
continue;
if (TargetRegisterInfo::isVirtualRegister(Reg))
continue;
if (MO.isUse())
if (MO.isUse()) {
// Can't touch anything to read a physical register.
PhysDef = 0;
return true;
}
if (MO.isDead())
// If the def is dead, it's ok.
continue;
@ -356,6 +357,7 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
if (!isCSECandidate(MI))
continue;
bool DefPhys = false;
bool FoundCSE = VNT.count(MI);
if (!FoundCSE) {
// Look for trivial copy coalescing opportunities.
@ -376,11 +378,13 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
// ... Unless the CS is local and it also defines the physical register
// which is not clobbered in between.
if (PhysDef && CSEPhysDef) {
if (PhysDef) {
unsigned CSVN = VNT.lookup(MI);
MachineInstr *CSMI = Exps[CSVN];
if (PhysRegDefReaches(CSMI, MI, PhysDef))
if (PhysRegDefReaches(CSMI, MI, PhysDef)) {
FoundCSE = true;
DefPhys = true;
}
}
}
@ -426,6 +430,8 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
}
MI->eraseFromParent();
++NumCSEs;
if (DefPhys)
++NumPhysCSEs;
} else {
DEBUG(dbgs() << "*** Not profitable, avoid CSE!\n");
VNT.insert(MI, CurrVN++);

18
test/CodeGen/ARM/machine-cse-cmp.ll Normal file
View File

@ -0,0 +1,18 @@
; RUN: llc < %s -march=arm | FileCheck %s
;rdar://8003725
@G1 = external global i32
@G2 = external global i32
define i32 @f1(i32 %cond1, i32 %x1, i32 %x2, i32 %x3) {
entry:
; CHECK: cmp
; CHECK: moveq
; CHECK-NOT: cmp
; CHECK: moveq
%tmp1 = icmp eq i32 %cond1, 0
%tmp2 = select i1 %tmp1, i32 %x1, i32 %x2
%tmp3 = select i1 %tmp1, i32 %x2, i32 %x3
%tmp4 = add i32 %tmp2, %tmp3
ret i32 %tmp4
}