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Add a perf optzn corresponding to PR1033.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32229 91177308-0d34-0410-b5e6-96231b3b80d8
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Chris Lattner 2006-12-05 18:25:10 +00:00
parent 399610a2e6
commit 2beb136e0b
1 changed files with 5 additions and 0 deletions
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5
lib/Target/X86/README-SSE.txt
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@ -18,6 +18,11 @@ Think about doing i64 math in SSE regs.
//===---------------------------------------------------------------------===//
Bitcast to<->from SSE registers should use movd/movq instead of going through
the stack. Testcase here: CodeGen/X86/bitcast.ll
//===---------------------------------------------------------------------===//
This testcase should have no SSE instructions in it, and only one load from
a constant pool: