Drop the reg argument to isRegReDefinedByTwoAddr, which was redundant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60586 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman
2008-12-05 05:45:42 +00:00
parent 4c0d951780
commit 2ce7f2068f
5 changed files with 9 additions and 8 deletions

View File

@ -646,13 +646,14 @@ int MachineInstr::findFirstPredOperandIdx() const {
return -1;
}
/// isRegReDefinedByTwoAddr - Given the defined register and the operand index,
/// isRegReDefinedByTwoAddr - Given the index of a register def operand,
/// check if the register def is a re-definition due to two addr elimination.
bool MachineInstr::isRegReDefinedByTwoAddr(unsigned Reg, unsigned DefIdx) const{
bool MachineInstr::isRegReDefinedByTwoAddr(unsigned DefIdx) const{
assert(getOperand(DefIdx).isDef() && "DefIdx is not a def!");
const TargetInstrDesc &TID = getDesc();
for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) {
const MachineOperand &MO = getOperand(i);
if (MO.isReg() && MO.isUse() && MO.getReg() == Reg &&
if (MO.isReg() && MO.isUse() &&
TID.getOperandConstraint(i, TOI::TIED_TO) == (int)DefIdx)
return true;
}