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ARM addressing mode cleanup for LDC/STC.
We parse at least some forms of the instructions now. Encoding is pretty screwed up, still, though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141704 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4253,8 +4253,8 @@ class ACI<dag oops, dag iops, string opc, string asm,
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multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
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def _OFFSET : ACI<(outs),
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!con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
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!strconcat(opc, cond), "\tp$cop, cr$CRd, $addr"> {
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!con((ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr), ops),
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!strconcat(opc, cond), "\t$cop, $CRd, $addr"> {
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let Inst{31-28} = op31_28;
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let Inst{24} = 1; // P = 1
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let Inst{21} = 0; // W = 0
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@ -4264,8 +4264,8 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
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}
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def _PRE : ACI<(outs),
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!con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
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!strconcat(opc, cond), "\tp$cop, cr$CRd, $addr!", IndexModePre> {
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!con((ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr), ops),
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!strconcat(opc, cond), "\t$cop, $CRd, $addr!", IndexModePre> {
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let Inst{31-28} = op31_28;
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let Inst{24} = 1; // P = 1
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let Inst{21} = 1; // W = 1
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@ -4275,8 +4275,10 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
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}
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def _POST : ACI<(outs),
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!con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
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!strconcat(opc, cond), "\tp$cop, cr$CRd, $addr", IndexModePost> {
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!con((ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
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postidx_imm8s4:$offset), ops),
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!strconcat(opc, cond), "\t$cop, $CRd, $addr, $offset",
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IndexModePost> {
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let Inst{31-28} = op31_28;
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let Inst{24} = 0; // P = 0
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let Inst{21} = 1; // W = 1
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@ -4286,9 +4288,10 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
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}
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def _OPTION : ACI<(outs),
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!con((ins nohash_imm:$cop,nohash_imm:$CRd,GPR:$base, nohash_imm:$option),
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!con((ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$base,
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nohash_imm:$option),
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ops),
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!strconcat(opc, cond), "\tp$cop, cr$CRd, [$base], \\{$option\\}"> {
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!strconcat(opc, cond), "\t$cop, $CRd, $base, \\{$option\\}"> {
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let Inst{31-28} = op31_28;
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let Inst{24} = 0; // P = 0
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let Inst{23} = 1; // U = 1
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@ -4299,8 +4302,8 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
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}
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def L_OFFSET : ACI<(outs),
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!con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
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!strconcat(!strconcat(opc, "l"), cond), "\tp$cop, cr$CRd, $addr"> {
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!con((ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr), ops),
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!strconcat(!strconcat(opc, "l"), cond), "\t$cop, $CRd, $addr"> {
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let Inst{31-28} = op31_28;
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let Inst{24} = 1; // P = 1
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let Inst{21} = 0; // W = 0
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@ -4310,8 +4313,8 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
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}
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def L_PRE : ACI<(outs),
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!con((ins nohash_imm:$cop, nohash_imm:$CRd, addrmode2:$addr), ops),
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!strconcat(!strconcat(opc, "l"), cond), "\tp$cop, cr$CRd, $addr!",
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!con((ins p_imm:$cop, c_imm:$CRd, addrmode5:$addr), ops),
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!strconcat(!strconcat(opc, "l"), cond), "\t$cop, $CRd, $addr!",
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IndexModePre> {
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let Inst{31-28} = op31_28;
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let Inst{24} = 1; // P = 1
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@ -4322,9 +4325,9 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
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}
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def L_POST : ACI<(outs),
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!con((ins nohash_imm:$cop, nohash_imm:$CRd, addr_offset_none:$addr,
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!con((ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$addr,
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postidx_imm8s4:$offset), ops),
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!strconcat(!strconcat(opc, "l"), cond), "\tp$cop, cr$CRd, $addr, $offset",
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!strconcat(!strconcat(opc, "l"), cond), "\t$cop, $CRd, $addr, $offset",
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IndexModePost> {
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let Inst{31-28} = op31_28;
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let Inst{24} = 0; // P = 0
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@ -4335,10 +4338,11 @@ multiclass LdStCop<bits<4> op31_28, bit load, dag ops, string opc, string cond>{
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}
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def L_OPTION : ACI<(outs),
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!con((ins nohash_imm:$cop, nohash_imm:$CRd,GPR:$base,nohash_imm:$option),
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!con((ins p_imm:$cop, c_imm:$CRd, addr_offset_none:$base,
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nohash_imm:$option),
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ops),
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!strconcat(!strconcat(opc, "l"), cond),
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"\tp$cop, cr$CRd, [$base], \\{$option\\}"> {
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"\t$cop, $CRd, $base, \\{$option\\}"> {
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let Inst{31-28} = op31_28;
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let Inst{24} = 0; // P = 0
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let Inst{23} = 1; // U = 1
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