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Custom lower f64 args passed in integer registers.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116977 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2010-10-21 00:01:47 +00:00
parent 6e56b18e57
commit 2d8f6fe610
1 changed files with 15 additions and 0 deletions
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15
lib/Target/ARM/ARMFastISel.cpp
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@ -1356,6 +1356,21 @@ bool ARMFastISel::ProcessCallArgs(SmallVectorImpl<Value*> &Args,
VA.getLocReg())
.addReg(Arg);
RegArgs.push_back(VA.getLocReg());
} else if (VA.needsCustom()) {
// TODO: We need custom lowering for vector (v2f64) args.
if (VA.getLocVT() != MVT::f64) return false;
CCValAssign &NextVA = ArgLocs[++i];
// TODO: Only handle register args for now.
if(!(VA.isRegLoc() && NextVA.isRegLoc())) return false;
AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
TII.get(ARM::VMOVRRD), VA.getLocReg())
.addReg(NextVA.getLocReg(), RegState::Define)
.addReg(Arg));
RegArgs.push_back(VA.getLocReg());
RegArgs.push_back(NextVA.getLocReg());
} else {
// Need to store
return false;