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Fix assert when decoding PSHUFB mask

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The PSHUFB mask decode routine used to assert if the mask index was out of
range (<0 or greater than the size of the vector).  The problem is, we can
legitimately have a PSHUFB with a large index using intrinsics.  The
instruction only uses the least significant 4 bits.  This change removes the
assert and masks the index to match the instruction behaviour.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218242 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Robert Lougher 2014-09-22 11:54:38 +00:00
parent 98ef3474ef
commit 2ee97f03a4
2 changed files with 34 additions and 6 deletions
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10
lib/Target/X86/Utils/X86ShuffleDecode.cpp
View File

@ -247,9 +247,8 @@ void DecodePSHUFBMask(const ConstantDataSequential *C,
if (Element & (1 << 7))
ShuffleMask.push_back(SM_SentinelZero);
else {
int Index = Base + Element;
assert((Index >= 0 && Index < NumElements) &&
"Out of bounds shuffle index for pshub instruction!");
// Only the least significant 4 bits of the byte are used.
int Index = Base + (Element & 0xf);
ShuffleMask.push_back(Index);
}
}
@ -266,9 +265,8 @@ void DecodePSHUFBMask(ArrayRef<uint64_t> RawMask,
if (M & (1 << 7))
ShuffleMask.push_back(SM_SentinelZero);
else {
int Index = Base + M;
assert((Index >= 0 && (unsigned)Index < RawMask.size()) &&
"Out of bounds shuffle index for pshub instruction!");
// Only the least significant 4 bits of the byte are used.
int Index = Base + (M & 0xf);
ShuffleMask.push_back(Index);
}
}

30
test/CodeGen/X86/pshufb-mask-comments.ll Normal file
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@ -0,0 +1,30 @@
; RUN: llc < %s -march=x86-64 -mattr=+ssse3 | FileCheck %s
; Test that the pshufb mask comment is correct.
define <16 x i8> @test1(<16 x i8> %V) {
; CHECK-LABEL: test1:
; CHECK: pshufb {{.*}} # xmm0 = xmm0[1,0,0,0,0,2,0,0,0,0,3,0,0,0,0,4]
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %V, <16 x i8> <i8 1, i8 0, i8 0, i8 0, i8 0, i8 2, i8 0, i8 0, i8 0, i8 0, i8 3, i8 0, i8 0, i8 0, i8 0, i8 4>)
ret <16 x i8> %1
}
; Test that indexes larger than the size of the vector are shown masked (bottom 4 bits).
define <16 x i8> @test2(<16 x i8> %V) {
; CHECK-LABEL: test2:
; CHECK: pshufb {{.*}} # xmm0 = xmm0[15,0,0,0,0,0,0,0,0,0,1,0,0,0,0,2]
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %V, <16 x i8> <i8 15, i8 0, i8 0, i8 0, i8 0, i8 16, i8 0, i8 0, i8 0, i8 0, i8 17, i8 0, i8 0, i8 0, i8 0, i8 50>)
ret <16 x i8> %1
}
; Test that indexes with bit seven set are shown as zero.
define <16 x i8> @test3(<16 x i8> %V) {
; CHECK-LABEL: test3:
; CHECK: pshufb {{.*}} # xmm0 = xmm0[1,0,0,15,0,2,0,0],zero,xmm0[0,3,0,0],zero,xmm0[0,4]
%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %V, <16 x i8> <i8 1, i8 0, i8 0, i8 127, i8 0, i8 2, i8 0, i8 0, i8 128, i8 0, i8 3, i8 0, i8 0, i8 255, i8 0, i8 4>)
ret <16 x i8> %1
}
declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) nounwind readnone