Added MOV instructions between rAX and memory offsets,

including segment offsets and (for 8-bit operands)
absolute offsets.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81457 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Sean Callanan 2009-09-10 18:33:42 +00:00
parent 1f24e01b87
commit 2f34a136b5
2 changed files with 23 additions and 0 deletions

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@ -317,6 +317,15 @@ def MOV64mi32 : RIi32<0xC7, MRM0m, (outs), (ins i64mem:$dst, i64i32imm:$src),
"mov{q}\t{$src, $dst|$dst, $src}",
[(store i64immSExt32:$src, addr:$dst)]>;
def MOV64o8a : RIi8<0xA0, RawFrm, (outs), (ins i8imm:$src),
"mov{q}\t{$src, %rax|%rax, $src}", []>;
def MOV64o32a : RIi32<0xA1, RawFrm, (outs), (ins i32imm:$src),
"mov{q}\t{$src, %rax|%rax, $src}", []>;
def MOV64ao8 : RIi8<0xA2, RawFrm, (outs i8imm:$dst), (ins),
"mov{q}\t{%rax, $dst|$dst, %rax}", []>;
def MOV64ao32 : RIi32<0xA3, RawFrm, (outs i32imm:$dst), (ins),
"mov{q}\t{%rax, $dst|$dst, %rax}", []>;
// Sign/Zero extenders
// MOVSX64rr8 always has a REX prefix and it has an 8-bit register

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@ -908,6 +908,20 @@ def MOV32mi : Ii32<0xC7, MRM0m, (outs), (ins i32mem:$dst, i32imm:$src),
"mov{l}\t{$src, $dst|$dst, $src}",
[(store (i32 imm:$src), addr:$dst)]>;
def MOV8o8a : Ii8 <0xA0, RawFrm, (outs), (ins i8imm:$src),
"mov{b}\t{$src, %al|%al, $src}", []>;
def MOV16o16a : Ii16 <0xA1, RawFrm, (outs), (ins i16imm:$src),
"mov{w}\t{$src, %ax|%ax, $src}", []>, OpSize;
def MOV32o32a : Ii32 <0xA1, RawFrm, (outs), (ins i32imm:$src),
"mov{l}\t{$src, %eax|%eax, $src}", []>;
def MOV8ao8 : Ii8 <0xA2, RawFrm, (outs i8imm:$dst), (ins),
"mov{b}\t{%al, $dst|$dst, %al}", []>;
def MOV16ao16 : Ii16 <0xA3, RawFrm, (outs i16imm:$dst), (ins),
"mov{w}\t{%ax, $dst|$dst, %ax}", []>, OpSize;
def MOV32ao32 : Ii32 <0xA3, RawFrm, (outs i32imm:$dst), (ins),
"mov{l}\t{%eax, $dst|$dst, %eax}", []>;
let canFoldAsLoad = 1, isReMaterializable = 1, mayHaveSideEffects = 1 in {
def MOV8rm : I<0x8A, MRMSrcMem, (outs GR8 :$dst), (ins i8mem :$src),
"mov{b}\t{$src, $dst|$dst, $src}",