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minor tweaks, reject vector preinc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31717 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -874,17 +874,22 @@ bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDOperand &Base,
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if (!EnablePPCPreinc) return false;
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SDOperand Ptr;
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MVT::ValueType VT;
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if (LoadSDNode *LD = dyn_cast<LoadSDNode>(N)) {
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Ptr = LD->getBasePtr();
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VT = LD->getValueType(0);
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} else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
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ST = ST;
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//Ptr = ST->getBasePtr();
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//VT = ST->getStoredVT();
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// TODO: handle stores.
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return false;
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Ptr = ST->getBasePtr();
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VT = ST->getStoredVT();
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return false; // TODO: Stores.
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} else
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return false;
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// PowerPC doesn't have preinc load/store instructions for vectors.
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if (MVT::isVector(VT))
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return false;
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// TODO: Handle reg+reg.
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if (!SelectAddressRegImm(Ptr, Offset, Base, DAG))
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return false;
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