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Changed code gen for int to f32 to use rounding. This makes FP results

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consistent with gcc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22791 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Laskey 2005-08-15 17:14:19 +00:00
parent d228427f87
commit 30679e691d
1 changed files with 2 additions and 2 deletions
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4
lib/Target/PowerPC/PPCISelPattern.cpp
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@ -2312,7 +2312,7 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
addFrameReference(BuildMI(BB, PPC::STW, 3).addReg(Tmp1), FrameIdx, 4);
addFrameReference(BuildMI(BB, PPC::LFD, 2, Tmp2), FrameIdx);
// Generate the return value with a subtract
BuildMI(BB, PPC::FSUB, 2, Result).addReg(Tmp2).addReg(ConstF);
BuildMI(BB, DestType == MVT::f64 ? PPC::FSUB : PPC::FSUBS, 2, Result).addReg(Tmp2).addReg(ConstF);
} else {
unsigned ConstF = getConstDouble(0x1.000008p52);
unsigned TmpL = MakeIntReg();
@ -2323,7 +2323,7 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) {
addFrameReference(BuildMI(BB, PPC::STW, 3).addReg(TmpL), FrameIdx, 4);
addFrameReference(BuildMI(BB, PPC::LFD, 2, Tmp2), FrameIdx);
// Generate the return value with a subtract
BuildMI(BB, PPC::FSUB, 2, Result).addReg(Tmp2).addReg(ConstF);
BuildMI(BB, DestType == MVT::f64 ? PPC::FSUB : PPC::FSUBS, 2, Result).addReg(Tmp2).addReg(ConstF);
}
return Result;
}