6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-03-13 08:35:46 +00:00
Code Issues Projects Releases Wiki Activity

RABasic fix. Regalloc is responsible for updating block live ins.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119896 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2010-11-20 02:57:05 +00:00
parent 13bdbb0544
commit 316df4bfe3
1 changed files with 30 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
lib/CodeGen/RegAllocBasic.cpp
View File

@ -107,6 +107,9 @@ public:
virtual bool runOnMachineFunction(MachineFunction &mf);
static char ID;
private:
void addMBBLiveIns();
};
char RABasic::ID = 0;
@ -465,6 +468,31 @@ unsigned RABasic::selectOrSplit(LiveInterval &lvr,
return 0;
}
// Add newly allocated physical register to the MBB live in sets.
void RABasic::addMBBLiveIns() {
SmallVector<MachineBasicBlock*, 8> liveInMBBs;
MachineBasicBlock &entryMBB = *mf_->begin();
for (unsigned preg = 0; preg < physReg2liu_.numRegs(); ++preg) {
LiveIntervalUnion &liu = physReg2liu_[preg];
for (LiveIntervalUnion::SegmentIter segI = liu.begin(), segE = liu.end();
segI != segE; ++segI) {
// Find the set of basic blocks which this range is live into...
if (lis_->findLiveInMBBs(segI->start, segI->end, liveInMBBs)) {
// And add the physreg for this interval to their live-in sets.
for (unsigned i = 0; i != liveInMBBs.size(); ++i) {
if (liveInMBBs[i] != &entryMBB) {
if (!liveInMBBs[i]->isLiveIn(preg)) {
liveInMBBs[i]->addLiveIn(preg);
}
}
}
liveInMBBs.clear();
}
}
}
}
namespace llvm {
Spiller *createInlineSpiller(MachineFunctionPass &pass,
MachineFunction &mf,
@ -496,6 +524,8 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) {
allocatePhysRegs();
addMBBLiveIns();
// Diagnostic output before rewriting
DEBUG(dbgs() << "Post alloc VirtRegMap:\n" << *vrm_ << "\n");