Eliminate uses of %prcontext.

- I'd appreciate it if someone else eyeballs my changes to make sure I captured
   the intent of the test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81083 91177308-0d34-0410-b5e6-96231b3b80d8

test/CodeGen/X86/2009-04-21-NoReloadImpDef.ll

@@ -1,7 +1,13 @@
-; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -mattr=-sse41,-sse3,+sse2 | \
-; RUN:   %prcontext {14} 2 | grep {(%ebp)} | count 1
+; RUN: llc -mtriple=i386-apple-darwin10.0 -relocation-model=pic \
+; RUN:     -disable-fp-elim -mattr=-sse41,-sse3,+sse2 < %s | \
+; RUN:   FileCheck %s
 ; rdar://6808032
 
+; CHECK: pextrw $14
+; CHECK-NEXT: movzbl
+; CHECK-NEXT: (%ebp)
+; CHECK-NEXT: pinsrw
+
 define void @update(i8** %args_list) nounwind {
 entry:
 	%cmp.i = icmp eq i32 0, 0		; <i1> [#uses=1]

test/CodeGen/X86/cmov-i8-eflags.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | %prcontext {setne	%al} 1 | grep test | count 2
+; RUN: llc -march=x86-64 < %s | FileCheck %s
 ; PR4814
 
 ; CodeGen shouldn't try to do a setne after an expanded 8-bit conditional
@@ -6,8 +6,8 @@
 ; move with control flow may clobber EFLAGS (e.g., with xor, to set the
 ; register to zero).
 
-; The prcontext usage above is a little awkward; the important part is that
-; there's a test before the setne.
+; The test is a little awkward; the important part is that there's a test before the
+; setne.
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
 
@@ -34,6 +34,12 @@ bb.i.i.i:                                         ; preds = %entry
   %4 = volatile load i8* @g_100, align 1          ; <i8> [#uses=0]
   br label %func_4.exit.i
 
+; CHECK: _g_100
+; CHECK: testb
+; CHECK: testb %al, %al
+; CHECK-NEXT: setne %al
+; CHECK-NEXT: testb
+
 func_4.exit.i:                                    ; preds = %bb.i.i.i, %entry
   %.not.i = xor i1 %2, true                       ; <i1> [#uses=1]
   %brmerge.i = or i1 %3, %.not.i                  ; <i1> [#uses=1]

test/CodeGen/X86/code_placement.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86 | %prcontext jmp 1 | grep align
+; RUN: llc -march=x86 < %s | FileCheck %s
 
 @Te0 = external global [256 x i32]		; <[256 x i32]*> [#uses=5]
 @Te1 = external global [256 x i32]		; <[256 x i32]*> [#uses=4]
@@ -12,6 +12,8 @@ entry:
 	%tmp15 = add i32 %r, -1		; <i32> [#uses=1]
 	%tmp.16 = zext i32 %tmp15 to i64		; <i64> [#uses=2]
 	br label %bb
+; CHECK: jmp
+; CHECK-NEXT: align
 
 bb:		; preds = %bb1, %entry
 	%indvar = phi i64 [ 0, %entry ], [ %indvar.next, %bb1 ]		; <i64> [#uses=3]

test/CodeGen/X86/inline-asm-flag-clobber.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | %prcontext test 1 | grep j
+; RUN: llc -march=x86-64 < %s | FileCheck %s
 ; PR3701
 
 define i64 @t(i64* %arg) nounwind {
@@ -7,6 +7,8 @@ define i64 @t(i64* %arg) nounwind {
 ; <label>:1		; preds = %0
 	%2 = icmp eq i64* null, %arg		; <i1> [#uses=1]
 	%3 = tail call i64* asm sideeffect "movl %fs:0,$0", "=r,~{dirflag},~{fpsr},~{flags}"() nounwind		; <%struct.thread*> [#uses=0]
+; CHECK: test
+; CHECK-NEXT: j
 	br i1 %2, label %4, label %5
 
 ; <label>:4		; preds = %1

test/CodeGen/X86/lsr-loop-exit-cond.ll

@@ -1,4 +1,7 @@
-; RUN: llvm-as < %s | llc -march=x86-64 | %prcontext decq 1 | grep jne
+; RUN: llc -march=x86-64 < %s | FileCheck %s
+
+; CHECK: decq
+; CHECK-NEXT: jne
 
 @Te0 = external global [256 x i32]		; <[256 x i32]*> [#uses=5]
 @Te1 = external global [256 x i32]		; <[256 x i32]*> [#uses=4]

test/Transforms/ConstantMerge/2003-10-28-MergeExternalConstants.ll

@@ -1,5 +1,7 @@
-; RUN: llvm-as < %s | opt -constmerge | llvm-dis | %prcontext foo 2 | grep bar
+; RUN: opt -S -constmerge %s | FileCheck %s
 
+; CHECK: @foo = constant i32 6
+; CHECK: @bar = constant i32 6
 @foo = constant i32 6           ; <i32*> [#uses=0]
 @bar = constant i32 6           ; <i32*> [#uses=0]
 

test/Transforms/GVN/lpre-call-wrap-2.ll

@@ -1,6 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn -enable-load-pre | llvm-dis > %t
-; RUN: %prcontext bb1: 2 < %t | grep phi
-; RUN: %prcontext bb1: 2 < %t | not grep load
+; RUN: opt -S -gvn -enable-load-pre %s | FileCheck %s
 ;
 ; The partially redundant load in bb1 should be hoisted to "bb".  This comes
 ; from this C code (GCC PR 23455):
@@ -30,6 +28,9 @@ bb:		; preds = %entry
 	br label %bb1
 
 bb1:		; preds = %bb, %entry
+; CHECK: bb1:
+; CHECK-NEXT: phi
+; CHECK-NEXT: getelementptr
 	%4 = load i32* @outcnt, align 4		; <i32> [#uses=1]
 	%5 = getelementptr i8* %outbuf, i32 %4		; <i8*> [#uses=1]
 	store i8 %bi_buf, i8* %5, align 1

test/Transforms/GVN/lpre-call-wrap.ll

@@ -1,6 +1,4 @@
-; RUN: llvm-as < %s | opt -gvn -enable-load-pre | llvm-dis > %t
-; RUN: %prcontext bb3.backedge: 2 < %t | grep phi
-; RUN: %prcontext bb3.backedge: 2 < %t | not grep load
+; RUN: opt -S -gvn -enable-load-pre %s | FileCheck %s
 ;
 ; Make sure the load in bb3.backedge is removed and moved into bb1 after the 
 ; call.  This makes the non-call case faster. 
@@ -43,6 +41,9 @@ bb1:		; preds = %bb
 	br label %bb3.backedge
 
 bb3.backedge:		; preds = %bb, %bb1
+; CHECK: bb3.backedge:
+; CHECK-NEXT: phi
+; CHECK-NEXT: icmp
 	%7 = load i32* %0, align 4		; <i32> [#uses=2]
 	%8 = icmp eq i32 %7, 0		; <i1> [#uses=1]
 	br i1 %8, label %return, label %bb

test/Transforms/IndVarSimplify/2003-09-23-NotAtTop.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -indvars | llvm-dis | %prcontext ^Loop: 1 | grep %Canonical
+; RUN: opt -S -indvars %s | FileCheck %s
 
 ; The indvar simplification code should ensure that the first PHI in the block 
 ; is the canonical one!
@@ -8,6 +8,8 @@ define i32 @test() {
         br label %Loop
 
 Loop:           ; preds = %Loop, %0
+; CHECK: Loop:
+; CHECK-NEXT: Canonical
         %NonIndvar = phi i32 [ 200, %0 ], [ %NonIndvarNext, %Loop ]             ; <i32> [#uses=1]
         %Canonical = phi i32 [ 0, %0 ], [ %CanonicalNext, %Loop ]               ; <i32> [#uses=2]
         store i32 %Canonical, i32* null

test/Transforms/Inline/alloca_test.ll

@@ -1,7 +1,7 @@
 ; This test ensures that alloca instructions in the entry block for an inlined
 ; function are moved to the top of the function they are inlined into.
 ;
-; RUN: llvm-as < %s | opt -inline | llvm-dis | %prcontext alloca 1 | grep Entry:
+; RUN: opt -S -inline %s | FileCheck %s
 
 define i32 @func(i32 %i) {
         %X = alloca i32         ; <i32*> [#uses=1]
@@ -13,6 +13,8 @@ declare void @bar()
 
 define i32 @main(i32 %argc) {
 Entry:
+; CHECK: Entry
+; CHECK-NEXT: alloca
         call void @bar( )
         %X = call i32 @func( i32 7 )            ; <i32> [#uses=1]
         %Y = add i32 %X, %argc          ; <i32> [#uses=1]

test/Transforms/InstCombine/2008-05-08-StrLenSink.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -instcombine | llvm-dis | %prcontext strlen 1 | not grep ret
+; RUN: opt -S -instcombine %s | FileCheck %s
 ; PR2297
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i386-apple-darwin8"
@@ -11,6 +11,10 @@ entry:
 	store i8 0, i8* %tmp3, align 1
 	%tmp5 = getelementptr i8* %tmp1, i32 0		; <i8*> [#uses=1]
 	store i8 1, i8* %tmp5, align 1
+; CHECK: store
+; CHECK: store
+; CHECK-NEXT: strlen
+; CHECK-NEXT: store
 	%tmp7 = call i32 @strlen( i8* %tmp1 ) nounwind readonly 		; <i32> [#uses=1]
 	%tmp9 = getelementptr i8* %tmp1, i32 0		; <i8*> [#uses=1]
 	store i8 0, i8* %tmp9, align 1

test/Transforms/InstCombine/hoist_instr.ll

@@ -1,5 +1,4 @@
-; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
-; RUN:   %prcontext div 1 | grep then:
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | FileCheck %s
 
 ;; This tests that the div is hoisted into the then block.
 define i32 @foo(i1 %C, i32 %A, i32 %B) {
@@ -7,6 +6,8 @@ entry:
         br i1 %C, label %then, label %endif
 
 then:           ; preds = %entry
+; CHECK: then:
+; CHECK-NEXT: sdiv i32
         br label %endif
 
 endif:          ; preds = %then, %entry

test/Transforms/InstCombine/sink_instruction.ll

@@ -1,5 +1,4 @@
-; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
-; RUN:   %prcontext div 1 | grep ret
+; RUN: opt -instcombine %s | llvm-dis | FileCheck %s
 
 ;; This tests that the instructions in the entry blocks are sunk into each
 ;; arm of the 'if'.
@@ -14,6 +13,8 @@ then:           ; preds = %entry
         ret i32 %tmp.9
 
 endif:          ; preds = %entry
+; CHECK: sdiv i32
+; CHECK-NEXT: ret i32
         ret i32 %tmp.2
 }
 

test/Transforms/LoopStrengthReduce/exit_compare_live_range.ll

@@ -2,8 +2,7 @@
 ; having overlapping live ranges that result in copies.  We want the setcc 
 ; instruction immediately before the conditional branch.
 ;
-; RUN: llvm-as < %s | opt -loop-reduce | llvm-dis | \
-; RUN:    %prcontext {br i1} 1 | grep icmp
+; RUN: opt -S -loop-reduce %s | FileCheck %s
 
 define void @foo(float* %D, i32 %E) {
 entry:
@@ -12,6 +11,8 @@ no_exit:		; preds = %no_exit, %entry
 	%indvar = phi i32 [ 0, %entry ], [ %indvar.next, %no_exit ]		; <i32> [#uses=1]
 	volatile store float 0.000000e+00, float* %D
 	%indvar.next = add i32 %indvar, 1		; <i32> [#uses=2]
+; CHECK: icmp
+; CHECK: br i1
 	%exitcond = icmp eq i32 %indvar.next, %E		; <i1> [#uses=1]
 	br i1 %exitcond, label %loopexit, label %no_exit
 loopexit:		; preds = %no_exit

test/Transforms/SimplifyLibCalls/half-powr.ll

@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | opt -simplify-libcalls-halfpowr | llvm-dis | %prcontext {mul float} 1 | grep {mul float} | count 8
+; RUN: opt -simplify-libcalls-halfpowr %s | llvm-dis | FileCheck %s
 
 define float @__half_powrf4(float %f, float %g) nounwind readnone {
 entry:
@@ -12,6 +12,11 @@ bb:		; preds = %entry
 bb1:		; preds = %bb, %entry
 	%f_addr.0 = phi float [ %1, %bb ], [ %f, %entry ]		; <float> [#uses=1]
 	%2 = fmul float %f_addr.0, %g		; <float> [#uses=1]
+; CHECK: fmul float %f_addr
+; CHECK: fmul float %f_addr
+; CHECK: fmul float %f_addr
+; CHECK: fmul float %f_addr
+
 	ret float %2
 }
 

test/Transforms/TailCallElim/move_alloca_for_tail_call.ll

@@ -1,9 +1,10 @@
-; RUN: llvm-as < %s | opt -tailcallelim | llvm-dis | \
-; RUN:    %prcontext alloca 1 | grep {i32 @foo}
+; RUN: opt -tailcallelim %s | llvm-dis | FileCheck %s
 
 declare void @bar(i32*)
 
 define i32 @foo() {
+; CHECK: i32 @foo()
+; CHECK: alloca
 	%A = alloca i32		; <i32*> [#uses=2]
 	store i32 17, i32* %A
 	call void @bar( i32* %A )