mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-22 09:29:31 +00:00
Support alignment for NEON vld-lane and vst-lane instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116776 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson
parent
87f4a1a433
commit
3454ed9545
@ -1298,6 +1298,17 @@ SDNode *ARMDAGToDAGISel::SelectVLDSTLane(SDNode *N, bool IsLoad,
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EVT VT = IsLoad ? N->getValueType(0) : N->getOperand(3).getValueType();
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bool is64BitVector = VT.is64BitVector();
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if (NumVecs != 3) {
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unsigned Alignment = cast<MemIntrinsicSDNode>(N)->getAlignment();
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unsigned NumBytes = NumVecs * VT.getVectorElementType().getSizeInBits()/8;
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if (Alignment > NumBytes)
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Alignment = NumBytes;
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// Alignment must be a power of two; make sure of that.
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Alignment = (Alignment & -Alignment);
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if (Alignment > 1)
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Align = CurDAG->getTargetConstant(Alignment, MVT::i32);
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}
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unsigned OpcodeIndex;
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switch (VT.getSimpleVT().SimpleTy) {
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default: llvm_unreachable("unhandled vld/vst lane type");
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@ -11,9 +11,10 @@
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define <8 x i8> @vld2lanei8(i8* %A, <8 x i8>* %B) nounwind {
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;CHECK: vld2lanei8:
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;CHECK: vld2.8
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;Check the alignment value. Max for this instruction is 16 bits:
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;CHECK: vld2.8 {d16[1], d17[1]}, [r0, :16]
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%tmp1 = load <8 x i8>* %B
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%tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1)
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%tmp2 = call %struct.__neon_int8x8x2_t @llvm.arm.neon.vld2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 4)
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%tmp3 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int8x8x2_t %tmp2, 1
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%tmp5 = add <8 x i8> %tmp3, %tmp4
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@ -22,10 +23,11 @@ define <8 x i8> @vld2lanei8(i8* %A, <8 x i8>* %B) nounwind {
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define <4 x i16> @vld2lanei16(i16* %A, <4 x i16>* %B) nounwind {
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;CHECK: vld2lanei16:
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;CHECK: vld2.16
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;Check the alignment value. Max for this instruction is 32 bits:
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;CHECK: vld2.16 {d16[1], d17[1]}, [r0, :32]
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%tmp0 = bitcast i16* %A to i8*
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%tmp1 = load <4 x i16>* %B
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%tmp2 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1)
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%tmp2 = call %struct.__neon_int16x4x2_t @llvm.arm.neon.vld2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
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%tmp3 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int16x4x2_t %tmp2, 1
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%tmp5 = add <4 x i16> %tmp3, %tmp4
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@ -58,10 +60,11 @@ define <2 x float> @vld2lanef(float* %A, <2 x float>* %B) nounwind {
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define <8 x i16> @vld2laneQi16(i16* %A, <8 x i16>* %B) nounwind {
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;CHECK: vld2laneQi16:
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;CHECK: vld2.16
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;Check the (default) alignment.
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;CHECK: vld2.16 {d17[1], d19[1]}, [r0]
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%tmp0 = bitcast i16* %A to i8*
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%tmp1 = load <8 x i16>* %B
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%tmp2 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1)
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%tmp2 = call %struct.__neon_int16x8x2_t @llvm.arm.neon.vld2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 5, i32 1)
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%tmp3 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int16x8x2_t %tmp2, 1
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%tmp5 = add <8 x i16> %tmp3, %tmp4
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@ -70,10 +73,11 @@ define <8 x i16> @vld2laneQi16(i16* %A, <8 x i16>* %B) nounwind {
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define <4 x i32> @vld2laneQi32(i32* %A, <4 x i32>* %B) nounwind {
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;CHECK: vld2laneQi32:
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;CHECK: vld2.32
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;Check the alignment value. Max for this instruction is 64 bits:
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;CHECK: vld2.32 {d17[0], d19[0]}, [r0, :64]
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%tmp0 = bitcast i32* %A to i8*
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%tmp1 = load <4 x i32>* %B
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%tmp2 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1)
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%tmp2 = call %struct.__neon_int32x4x2_t @llvm.arm.neon.vld2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 16)
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%tmp3 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int32x4x2_t %tmp2, 1
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%tmp5 = add <4 x i32> %tmp3, %tmp4
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@ -125,10 +129,11 @@ define <8 x i8> @vld3lanei8(i8* %A, <8 x i8>* %B) nounwind {
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define <4 x i16> @vld3lanei16(i16* %A, <4 x i16>* %B) nounwind {
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;CHECK: vld3lanei16:
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;CHECK: vld3.16
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;Check the (default) alignment value. VLD3 does not support alignment.
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;CHECK: vld3.16 {d16[1], d17[1], d18[1]}, [r0]
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%tmp0 = bitcast i16* %A to i8*
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%tmp1 = load <4 x i16>* %B
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%tmp2 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1)
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%tmp2 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
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%tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 1
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%tmp5 = extractvalue %struct.__neon_int16x4x3_t %tmp2, 2
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@ -167,10 +172,11 @@ define <2 x float> @vld3lanef(float* %A, <2 x float>* %B) nounwind {
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define <8 x i16> @vld3laneQi16(i16* %A, <8 x i16>* %B) nounwind {
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;CHECK: vld3laneQi16:
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;CHECK: vld3.16
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;Check the (default) alignment value. VLD3 does not support alignment.
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;CHECK: vld3.16 {d16[1], d18[1], d20[1]}, [r0]
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%tmp0 = bitcast i16* %A to i8*
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%tmp1 = load <8 x i16>* %B
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%tmp2 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1)
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%tmp2 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 8)
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%tmp3 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 1
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%tmp5 = extractvalue %struct.__neon_int16x8x3_t %tmp2, 2
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@ -227,9 +233,10 @@ declare %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3lane.v4f32(i8*, <4 x flo
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define <8 x i8> @vld4lanei8(i8* %A, <8 x i8>* %B) nounwind {
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;CHECK: vld4lanei8:
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;CHECK: vld4.8
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;Check the alignment value. Max for this instruction is 32 bits:
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;CHECK: vld4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32]
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%tmp1 = load <8 x i8>* %B
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%tmp2 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1)
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%tmp2 = call %struct.__neon_int8x8x4_t @llvm.arm.neon.vld4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8)
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%tmp3 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 1
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%tmp5 = extractvalue %struct.__neon_int8x8x4_t %tmp2, 2
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@ -258,10 +265,11 @@ define <4 x i16> @vld4lanei16(i16* %A, <4 x i16>* %B) nounwind {
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define <2 x i32> @vld4lanei32(i32* %A, <2 x i32>* %B) nounwind {
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;CHECK: vld4lanei32:
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;CHECK: vld4.32
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;Check the alignment value. Max for this instruction is 128 bits:
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;CHECK: vld4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128]
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%tmp0 = bitcast i32* %A to i8*
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%tmp1 = load <2 x i32>* %B
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%tmp2 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1)
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%tmp2 = call %struct.__neon_int32x2x4_t @llvm.arm.neon.vld4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 16)
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%tmp3 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 1
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%tmp5 = extractvalue %struct.__neon_int32x2x4_t %tmp2, 2
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@ -290,10 +298,11 @@ define <2 x float> @vld4lanef(float* %A, <2 x float>* %B) nounwind {
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define <8 x i16> @vld4laneQi16(i16* %A, <8 x i16>* %B) nounwind {
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;CHECK: vld4laneQi16:
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;CHECK: vld4.16
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;Check the alignment value. Max for this instruction is 64 bits:
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;CHECK: vld4.16 {d16[1], d18[1], d20[1], d22[1]}, [r0, :64]
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%tmp0 = bitcast i16* %A to i8*
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%tmp1 = load <8 x i16>* %B
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%tmp2 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1)
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%tmp2 = call %struct.__neon_int16x8x4_t @llvm.arm.neon.vld4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 16)
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%tmp3 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 1
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%tmp5 = extractvalue %struct.__neon_int16x8x4_t %tmp2, 2
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@ -306,10 +315,11 @@ define <8 x i16> @vld4laneQi16(i16* %A, <8 x i16>* %B) nounwind {
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define <4 x i32> @vld4laneQi32(i32* %A, <4 x i32>* %B) nounwind {
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;CHECK: vld4laneQi32:
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;CHECK: vld4.32
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;Check the (default) alignment.
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;CHECK: vld4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0]
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%tmp0 = bitcast i32* %A to i8*
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%tmp1 = load <4 x i32>* %B
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%tmp2 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 1, i32 1)
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%tmp2 = call %struct.__neon_int32x4x4_t @llvm.arm.neon.vld4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1)
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%tmp3 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 0
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%tmp4 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 1
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%tmp5 = extractvalue %struct.__neon_int32x4x4_t %tmp2, 2
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@ -2,18 +2,20 @@
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define void @vst2lanei8(i8* %A, <8 x i8>* %B) nounwind {
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;CHECK: vst2lanei8:
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;CHECK: vst2.8
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;Check the alignment value. Max for this instruction is 16 bits:
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;CHECK: vst2.8 {d16[1], d17[1]}, [r0, :16]
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%tmp1 = load <8 x i8>* %B
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call void @llvm.arm.neon.vst2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1)
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call void @llvm.arm.neon.vst2lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 4)
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ret void
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}
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define void @vst2lanei16(i16* %A, <4 x i16>* %B) nounwind {
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;CHECK: vst2lanei16:
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;CHECK: vst2.16
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;Check the alignment value. Max for this instruction is 32 bits:
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;CHECK: vst2.16 {d16[1], d17[1]}, [r0, :32]
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%tmp0 = bitcast i16* %A to i8*
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%tmp1 = load <4 x i16>* %B
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call void @llvm.arm.neon.vst2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1)
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call void @llvm.arm.neon.vst2lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
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ret void
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}
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@ -37,19 +39,21 @@ define void @vst2lanef(float* %A, <2 x float>* %B) nounwind {
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define void @vst2laneQi16(i16* %A, <8 x i16>* %B) nounwind {
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;CHECK: vst2laneQi16:
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;CHECK: vst2.16
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;Check the (default) alignment.
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;CHECK: vst2.16 {d17[1], d19[1]}, [r0]
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%tmp0 = bitcast i16* %A to i8*
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%tmp1 = load <8 x i16>* %B
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call void @llvm.arm.neon.vst2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 1, i32 1)
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call void @llvm.arm.neon.vst2lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 5, i32 1)
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ret void
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}
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define void @vst2laneQi32(i32* %A, <4 x i32>* %B) nounwind {
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;CHECK: vst2laneQi32:
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;CHECK: vst2.32
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;Check the alignment value. Max for this instruction is 64 bits:
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;CHECK: vst2.32 {d17[0], d19[0]}, [r0, :64]
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%tmp0 = bitcast i32* %A to i8*
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%tmp1 = load <4 x i32>* %B
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call void @llvm.arm.neon.vst2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1)
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call void @llvm.arm.neon.vst2lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 16)
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ret void
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}
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@ -81,10 +85,11 @@ define void @vst3lanei8(i8* %A, <8 x i8>* %B) nounwind {
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define void @vst3lanei16(i16* %A, <4 x i16>* %B) nounwind {
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;CHECK: vst3lanei16:
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;CHECK: vst3.16
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;Check the (default) alignment value. VST3 does not support alignment.
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;CHECK: vst3.16 {d16[1], d17[1], d18[1]}, [r0]
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%tmp0 = bitcast i16* %A to i8*
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%tmp1 = load <4 x i16>* %B
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call void @llvm.arm.neon.vst3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 1)
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call void @llvm.arm.neon.vst3lane.v4i16(i8* %tmp0, <4 x i16> %tmp1, <4 x i16> %tmp1, <4 x i16> %tmp1, i32 1, i32 8)
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ret void
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}
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@ -108,10 +113,11 @@ define void @vst3lanef(float* %A, <2 x float>* %B) nounwind {
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define void @vst3laneQi16(i16* %A, <8 x i16>* %B) nounwind {
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;CHECK: vst3laneQi16:
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;CHECK: vst3.16
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;Check the (default) alignment value. VST3 does not support alignment.
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;CHECK: vst3.16 {d17[2], d19[2], d21[2]}, [r0]
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%tmp0 = bitcast i16* %A to i8*
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%tmp1 = load <8 x i16>* %B
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call void @llvm.arm.neon.vst3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 6, i32 1)
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call void @llvm.arm.neon.vst3lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 6, i32 8)
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ret void
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}
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@ -145,9 +151,10 @@ declare void @llvm.arm.neon.vst3lane.v4f32(i8*, <4 x float>, <4 x float>, <4 x f
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define void @vst4lanei8(i8* %A, <8 x i8>* %B) nounwind {
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;CHECK: vst4lanei8:
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;CHECK: vst4.8
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;Check the alignment value. Max for this instruction is 32 bits:
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;CHECK: vst4.8 {d16[1], d17[1], d18[1], d19[1]}, [r0, :32]
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%tmp1 = load <8 x i8>* %B
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||||
call void @llvm.arm.neon.vst4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 1)
|
||||
call void @llvm.arm.neon.vst4lane.v8i8(i8* %A, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, <8 x i8> %tmp1, i32 1, i32 8)
|
||||
ret void
|
||||
}
|
||||
|
||||
@ -162,10 +169,11 @@ define void @vst4lanei16(i16* %A, <4 x i16>* %B) nounwind {
|
||||
|
||||
define void @vst4lanei32(i32* %A, <2 x i32>* %B) nounwind {
|
||||
;CHECK: vst4lanei32:
|
||||
;CHECK: vst4.32
|
||||
;Check the alignment value. Max for this instruction is 128 bits:
|
||||
;CHECK: vst4.32 {d16[1], d17[1], d18[1], d19[1]}, [r0, :128]
|
||||
%tmp0 = bitcast i32* %A to i8*
|
||||
%tmp1 = load <2 x i32>* %B
|
||||
call void @llvm.arm.neon.vst4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 1)
|
||||
call void @llvm.arm.neon.vst4lane.v2i32(i8* %tmp0, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, <2 x i32> %tmp1, i32 1, i32 16)
|
||||
ret void
|
||||
}
|
||||
|
||||
@ -180,16 +188,18 @@ define void @vst4lanef(float* %A, <2 x float>* %B) nounwind {
|
||||
|
||||
define void @vst4laneQi16(i16* %A, <8 x i16>* %B) nounwind {
|
||||
;CHECK: vst4laneQi16:
|
||||
;CHECK: vst4.16
|
||||
;Check the alignment value. Max for this instruction is 64 bits:
|
||||
;CHECK: vst4.16 {d17[3], d19[3], d21[3], d23[3]}, [r0, :64]
|
||||
%tmp0 = bitcast i16* %A to i8*
|
||||
%tmp1 = load <8 x i16>* %B
|
||||
call void @llvm.arm.neon.vst4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 7, i32 1)
|
||||
call void @llvm.arm.neon.vst4lane.v8i16(i8* %tmp0, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, <8 x i16> %tmp1, i32 7, i32 16)
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @vst4laneQi32(i32* %A, <4 x i32>* %B) nounwind {
|
||||
;CHECK: vst4laneQi32:
|
||||
;CHECK: vst4.32
|
||||
;Check the (default) alignment.
|
||||
;CHECK: vst4.32 {d17[0], d19[0], d21[0], d23[0]}, [r0]
|
||||
%tmp0 = bitcast i32* %A to i8*
|
||||
%tmp1 = load <4 x i32>* %B
|
||||
call void @llvm.arm.neon.vst4lane.v4i32(i8* %tmp0, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, <4 x i32> %tmp1, i32 2, i32 1)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user