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Add mayLoad/mayStore markings to ARM 64-bit atomic pseudo-instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139179 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eli Friedman 2011-09-06 20:53:37 +00:00
parent 0b533a3bd3
commit 34c4485b74
1 changed files with 1 additions and 1 deletions
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lib/Target/ARM/ARMInstrInfo.td
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@ -1611,7 +1611,7 @@ PseudoInst<(outs), (ins i32imm:$amt, pred:$p), NoItinerary,
// Atomic pseudo-insts which will be lowered to ldrexd/strexd loops.
// (These psuedos use a hand-written selection code).
let usesCustomInserter = 1, Defs = [CPSR] in {
let usesCustomInserter = 1, Defs = [CPSR], mayLoad = 1, mayStore = 1 in {
def ATOMOR6432 : PseudoInst<(outs GPR:$dst1, GPR:$dst2),
(ins GPR:$addr, GPR:$src1, GPR:$src2),
NoItinerary, []>;