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https://github.com/c64scene-ar/llvm-6502.git
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use assertions instead of unreachable for logic errors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100724 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -32,13 +32,11 @@
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#include "llvm/LLVMContext.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include <map>
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using namespace llvm;
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//===----------------------------------------------------------------------===//
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@ -968,11 +966,11 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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Node->dump( &DAG);
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dbgs() << "\n";
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#endif
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llvm_unreachable("Do not know how to legalize this operator!");
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assert(0 && "Do not know how to legalize this operator!");
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case ISD::BUILD_VECTOR:
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switch (TLI.getOperationAction(ISD::BUILD_VECTOR, Node->getValueType(0))) {
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default: llvm_unreachable("This action is not supported yet!");
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default: assert(0 && "This action is not supported yet!");
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case TargetLowering::Custom:
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Tmp3 = TLI.LowerOperation(Result, DAG);
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if (Tmp3.getNode()) {
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@ -1089,7 +1087,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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Tmp4 = Result.getValue(1);
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switch (TLI.getOperationAction(Node->getOpcode(), VT)) {
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default: llvm_unreachable("This action is not supported yet!");
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default: assert(0 && "This action is not supported yet!");
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case TargetLowering::Legal:
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// If this is an unaligned load and the target doesn't support it,
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// expand it.
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@ -1259,7 +1257,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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Tmp2 = LegalizeOp(Ch);
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} else {
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switch (TLI.getLoadExtAction(ExtType, SrcVT)) {
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default: llvm_unreachable("This action is not supported yet!");
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default: assert(0 && "This action is not supported yet!");
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case TargetLowering::Custom:
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isCustom = true;
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// FALLTHROUGH
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@ -1357,7 +1355,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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EVT VT = Tmp3.getValueType();
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switch (TLI.getOperationAction(ISD::STORE, VT)) {
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default: llvm_unreachable("This action is not supported yet!");
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default: assert(0 && "This action is not supported yet!");
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case TargetLowering::Legal:
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// If this is an unaligned store and the target doesn't support it,
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// expand it.
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@ -1459,7 +1457,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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ST->getOffset());
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switch (TLI.getTruncStoreAction(ST->getValue().getValueType(), StVT)) {
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default: llvm_unreachable("This action is not supported yet!");
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default: assert(0 && "This action is not supported yet!");
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case TargetLowering::Legal:
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// If this is an unaligned store and the target doesn't support it,
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// expand it.
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@ -1683,7 +1681,7 @@ void SelectionDAGLegalize::LegalizeSetCCCondCode(EVT VT,
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EVT OpVT = LHS.getValueType();
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ISD::CondCode CCCode = cast<CondCodeSDNode>(CC)->get();
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switch (TLI.getCondCodeAction(CCCode, OpVT)) {
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default: llvm_unreachable("Unknown condition code action!");
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default: assert(0 && "Unknown condition code action!");
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case TargetLowering::Legal:
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// Nothing to do.
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break;
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@ -1691,7 +1689,7 @@ void SelectionDAGLegalize::LegalizeSetCCCondCode(EVT VT,
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ISD::CondCode CC1 = ISD::SETCC_INVALID, CC2 = ISD::SETCC_INVALID;
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unsigned Opc = 0;
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switch (CCCode) {
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default: llvm_unreachable("Don't know how to expand this condition!");
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default: assert(0 && "Don't know how to expand this condition!");
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case ISD::SETOEQ: CC1 = ISD::SETEQ; CC2 = ISD::SETO; Opc = ISD::AND; break;
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case ISD::SETOGT: CC1 = ISD::SETGT; CC2 = ISD::SETO; Opc = ISD::AND; break;
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case ISD::SETOGE: CC1 = ISD::SETGE; CC2 = ISD::SETO; Opc = ISD::AND; break;
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@ -1930,7 +1928,7 @@ SDValue SelectionDAGLegalize::ExpandFPLibCall(SDNode* Node,
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RTLIB::Libcall Call_PPCF128) {
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RTLIB::Libcall LC;
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switch (Node->getValueType(0).getSimpleVT().SimpleTy) {
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default: llvm_unreachable("Unexpected request for libcall!");
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default: assert(0 && "Unexpected request for libcall!");
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case MVT::f32: LC = Call_F32; break;
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case MVT::f64: LC = Call_F64; break;
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case MVT::f80: LC = Call_F80; break;
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@ -1947,7 +1945,7 @@ SDValue SelectionDAGLegalize::ExpandIntLibCall(SDNode* Node, bool isSigned,
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RTLIB::Libcall Call_I128) {
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RTLIB::Libcall LC;
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switch (Node->getValueType(0).getSimpleVT().SimpleTy) {
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default: llvm_unreachable("Unexpected request for libcall!");
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default: assert(0 && "Unexpected request for libcall!");
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case MVT::i8: LC = Call_I8; break;
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case MVT::i16: LC = Call_I16; break;
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case MVT::i32: LC = Call_I32; break;
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@ -2062,7 +2060,7 @@ SDValue SelectionDAGLegalize::ExpandLegalINT_TO_FP(bool isSigned,
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// offset depending on the data type.
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uint64_t FF;
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switch (Op0.getValueType().getSimpleVT().SimpleTy) {
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default: llvm_unreachable("Unsupported integer type!");
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default: assert(0 && "Unsupported integer type!");
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case MVT::i8 : FF = 0x43800000ULL; break; // 2^8 (as a float)
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case MVT::i16: FF = 0x47800000ULL; break; // 2^16 (as a float)
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case MVT::i32: FF = 0x4F800000ULL; break; // 2^32 (as a float)
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@ -2182,7 +2180,7 @@ SDValue SelectionDAGLegalize::ExpandBSWAP(SDValue Op, DebugLoc dl) {
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EVT SHVT = TLI.getShiftAmountTy();
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SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8;
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switch (VT.getSimpleVT().SimpleTy) {
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default: llvm_unreachable("Unhandled Expand type in BSWAP!");
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default: assert(0 && "Unhandled Expand type in BSWAP!");
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case MVT::i16:
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Tmp2 = DAG.getNode(ISD::SHL, dl, VT, Op, DAG.getConstant(8, SHVT));
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Tmp1 = DAG.getNode(ISD::SRL, dl, VT, Op, DAG.getConstant(8, SHVT));
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@ -2227,7 +2225,7 @@ SDValue SelectionDAGLegalize::ExpandBSWAP(SDValue Op, DebugLoc dl) {
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SDValue SelectionDAGLegalize::ExpandBitCount(unsigned Opc, SDValue Op,
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DebugLoc dl) {
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switch (Opc) {
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default: llvm_unreachable("Cannot expand this yet!");
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default: assert(0 && "Cannot expand this yet!");
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case ISD::CTPOP: {
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static const uint64_t mask[6] = {
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0x5555555555555555ULL, 0x3333333333333333ULL,
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@ -2333,10 +2331,10 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node,
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EVT VT = Node->getValueType(0);
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if (VT.isInteger())
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Results.push_back(DAG.getConstant(0, VT));
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else if (VT.isFloatingPoint())
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else {
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assert(VT.isFloatingPoint() && "Unknown value type!");
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Results.push_back(DAG.getConstantFP(0, VT));
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else
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llvm_unreachable("Unknown value type!");
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}
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break;
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}
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case ISD::TRAP: {
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@ -2842,7 +2840,14 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node,
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BottomHalf = DAG.getNode(Ops[isSigned][1], dl, DAG.getVTList(VT, VT), LHS,
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RHS);
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TopHalf = BottomHalf.getValue(1);
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} else if (TLI.isTypeLegal(EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits() * 2))) {
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} else {
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// FIXME: We should be able to fall back to a libcall with an illegal
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// type in some cases.
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// Also, we can fall back to a division in some cases, but that's a big
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// performance hit in the general case.
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assert(TLI.isTypeLegal(EVT::getIntegerVT(*DAG.getContext(),
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VT.getSizeInBits() * 2)) &&
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"Don't know how to expand this operation yet!");
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EVT WideVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits() * 2);
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LHS = DAG.getNode(Ops[isSigned][2], dl, WideVT, LHS);
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RHS = DAG.getNode(Ops[isSigned][2], dl, WideVT, RHS);
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@ -2851,12 +2856,6 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node,
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DAG.getIntPtrConstant(0));
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TopHalf = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT, Tmp1,
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DAG.getIntPtrConstant(1));
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} else {
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// FIXME: We should be able to fall back to a libcall with an illegal
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// type in some cases.
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// Also, we can fall back to a division in some cases, but that's a big
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// performance hit in the general case.
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llvm_unreachable("Don't know how to expand this operation yet!");
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}
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if (isSigned) {
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Tmp1 = DAG.getConstant(VT.getSizeInBits() - 1, TLI.getShiftAmountTy());
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@ -3078,11 +3077,10 @@ void SelectionDAGLegalize::PromoteNode(SDNode *Node,
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if (OVT.isVector()) {
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ExtOp = ISD::BIT_CONVERT;
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TruncOp = ISD::BIT_CONVERT;
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} else if (OVT.isInteger()) {
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} else {
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assert(OVT.isInteger() && "Cannot promote logic operation");
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ExtOp = ISD::ANY_EXTEND;
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TruncOp = ISD::TRUNCATE;
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} else {
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report_fatal_error("Cannot promote logic operation");
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}
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// Promote each of the values to the new type.
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Tmp1 = DAG.getNode(ExtOp, dl, NVT, Node->getOperand(0));
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