mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-02 07:11:49 +00:00
Moved some more index operations over to LiveIntervals.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81605 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
2a46f3678e
commit
35f291d2c5
@ -167,7 +167,7 @@ void LiveInterval::extendIntervalEndTo(Ranges::iterator I, MachineInstrIndex New
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ranges.erase(next(I), MergeTo);
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// Update kill info.
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ValNo->removeKills(OldEnd, I->end.prevSlot());
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ValNo->removeKills(OldEnd, I->end.prevSlot_());
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// If the newly formed range now touches the range after it and if they have
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// the same value number, merge the two ranges into one range.
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@ -278,7 +278,7 @@ void LiveIntervals::computeNumbering() {
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MachineInstrIndex StartIdx = MIIndex;
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// Insert an empty slot at the beginning of each block.
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MIIndex = MIIndex.nextIndex();
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MIIndex = getNextIndex(MIIndex);
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i2miMap_.push_back(0);
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for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
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@ -295,14 +295,14 @@ void LiveIntervals::computeNumbering() {
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inserted = inserted; // Avoid compiler warning if assertions turned off.
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i2miMap_.push_back(0);
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MIIndex = MIIndex.nextIndex();
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MIIndex = getNextIndex(MIIndex);
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}
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bool inserted = mi2iMap_.insert(std::make_pair(I, MIIndex)).second;
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assert(inserted && "multiple MachineInstr -> index mappings");
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inserted = true;
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i2miMap_.push_back(I);
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MIIndex = MIIndex.nextIndex();
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MIIndex = getNextIndex(MIIndex);
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FunctionSize++;
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// Insert max(1, numdefs) empty slots after every instruction.
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@ -310,7 +310,7 @@ void LiveIntervals::computeNumbering() {
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if (Slots == 0)
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Slots = 1;
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while (Slots--) {
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MIIndex = MIIndex.nextIndex();
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MIIndex = getNextIndex(MIIndex);
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i2miMap_.push_back(0);
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}
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@ -327,11 +327,11 @@ void LiveIntervals::computeNumbering() {
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inserted = inserted; // Avoid compiler warning if assertions turned off.
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i2miMap_.push_back(0);
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MIIndex = MIIndex.nextIndex();
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MIIndex = getNextIndex(MIIndex);
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}
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// Set the MBB2IdxMap entry for this MBB.
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MBB2IdxMap[MBB->getNumber()] = std::make_pair(StartIdx, MIIndex.prevSlot());
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MBB2IdxMap[MBB->getNumber()] = std::make_pair(StartIdx, getPrevSlot(MIIndex));
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Idx2MBBMap.push_back(std::make_pair(StartIdx, MBB));
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}
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@ -365,7 +365,7 @@ void LiveIntervals::computeNumbering() {
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// Remap the ending index in the same way that we remapped the start,
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// except for the final step where we always map to the immediately
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// following instruction.
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index = (LI->end.prevSlot()).getVecIndex();
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index = (getPrevSlot(LI->end)).getVecIndex();
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offset = LI->end.getSlot();
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if (LI->end.isLoad()) {
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// VReg dies at end of block.
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@ -373,7 +373,7 @@ void LiveIntervals::computeNumbering() {
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std::lower_bound(OldI2MBB.begin(), OldI2MBB.end(), LI->end);
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--I;
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LI->end = getMBBEndIdx(I->second).nextSlot();
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LI->end = getNextSlot(getMBBEndIdx(I->second));
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} else {
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unsigned idx = index;
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while (index < OldI2MI.size() && !OldI2MI[index]) ++index;
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@ -414,7 +414,7 @@ void LiveIntervals::computeNumbering() {
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// Remap the VNInfo kill indices, which works the same as
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// the end indices above.
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for (size_t i = 0; i < vni->kills.size(); ++i) {
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unsigned index = vni->kills[i].prevSlot().getVecIndex();
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unsigned index = getPrevSlot(vni->kills[i]).getVecIndex();
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MachineInstrIndex::Slot offset = vni->kills[i].getSlot();
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if (vni->kills[i].isLoad()) {
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@ -552,11 +552,11 @@ bool LiveIntervals::conflictsWithPhysRegDef(const LiveInterval &li,
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for (LiveInterval::Ranges::const_iterator
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I = li.ranges.begin(), E = li.ranges.end(); I != E; ++I) {
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for (MachineInstrIndex index = getBaseIndex(I->start),
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end = getBaseIndex(I->end.prevSlot()).nextIndex(); index != end;
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index = index.nextIndex()) {
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end = getNextIndex(getBaseIndex(getPrevSlot(I->end))); index != end;
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index = getNextIndex(index)) {
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// skip deleted instructions
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while (index != end && !getInstructionFromIndex(index))
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index = index.nextIndex();
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index = getNextIndex(index);
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if (index == end) break;
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MachineInstr *MI = getInstructionFromIndex(index);
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@ -593,15 +593,15 @@ bool LiveIntervals::conflictsWithPhysRegRef(LiveInterval &li,
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for (LiveInterval::Ranges::const_iterator
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I = li.ranges.begin(), E = li.ranges.end(); I != E; ++I) {
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for (MachineInstrIndex index = getBaseIndex(I->start),
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end = getBaseIndex(I->end.prevSlot()).nextIndex(); index != end;
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index = index.nextIndex()) {
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end = getNextIndex(getBaseIndex(getPrevSlot(I->end))); index != end;
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index = getNextIndex(index)) {
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// Skip deleted instructions.
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MachineInstr *MI = 0;
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while (index != end) {
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MI = getInstructionFromIndex(index);
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if (MI)
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break;
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index = index.nextIndex();
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index = getNextIndex(index);
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}
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if (index == end) break;
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@ -676,9 +676,9 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// FIXME: what about dead vars?
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MachineInstrIndex killIdx;
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if (vi.Kills[0] != mi)
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killIdx = getUseIndex(getInstructionIndex(vi.Kills[0])).nextSlot();
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killIdx = getNextSlot(getUseIndex(getInstructionIndex(vi.Kills[0])));
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else
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killIdx = defIndex.nextSlot();
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killIdx = getNextSlot(defIndex);
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// If the kill happens after the definition, we have an intra-block
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// live range.
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@ -697,7 +697,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// of the defining block, potentially live across some blocks, then is
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// live into some number of blocks, but gets killed. Start by adding a
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// range that goes from this definition to the end of the defining block.
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LiveRange NewLR(defIndex, getMBBEndIdx(mbb).nextSlot(), ValNo);
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LiveRange NewLR(defIndex, getNextSlot(getMBBEndIdx(mbb)), ValNo);
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DEBUG(errs() << " +" << NewLR);
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interval.addRange(NewLR);
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@ -707,7 +707,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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for (SparseBitVector<>::iterator I = vi.AliveBlocks.begin(),
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E = vi.AliveBlocks.end(); I != E; ++I) {
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LiveRange LR(getMBBStartIdx(*I),
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getMBBEndIdx(*I).nextSlot(), // MBB ends at -1.
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getNextSlot(getMBBEndIdx(*I)), // MBB ends at -1.
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ValNo);
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interval.addRange(LR);
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DEBUG(errs() << " +" << LR);
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@ -718,7 +718,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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for (unsigned i = 0, e = vi.Kills.size(); i != e; ++i) {
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MachineInstr *Kill = vi.Kills[i];
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MachineInstrIndex killIdx =
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getUseIndex(getInstructionIndex(Kill)).nextSlot();
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getNextSlot(getUseIndex(getInstructionIndex(Kill)));
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LiveRange LR(getMBBStartIdx(Kill->getParent()),
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killIdx, ValNo);
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interval.addRange(LR);
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@ -743,7 +743,8 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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if (MO.isEarlyClobber())
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RedefIndex = getUseIndex(MIIdx);
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const LiveRange *OldLR = interval.getLiveRangeContaining(RedefIndex.prevSlot());
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const LiveRange *OldLR =
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interval.getLiveRangeContaining(getPrevSlot(RedefIndex));
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VNInfo *OldValNo = OldLR->valno;
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// Delete the initial value, which should be short and continuous,
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@ -776,8 +777,8 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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// If this redefinition is dead, we need to add a dummy unit live
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// range covering the def slot.
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if (MO.isDead())
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interval.addRange(LiveRange(RedefIndex,
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RedefIndex.nextSlot(), OldValNo));
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interval.addRange(
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LiveRange(RedefIndex, getNextSlot(RedefIndex), OldValNo));
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DEBUG({
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errs() << " RESULT: ";
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@ -796,7 +797,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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MachineInstr *Killer = vi.Kills[0];
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MachineInstrIndex Start = getMBBStartIdx(Killer->getParent());
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MachineInstrIndex End =
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getUseIndex(getInstructionIndex(Killer)).nextSlot();
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getNextSlot(getUseIndex(getInstructionIndex(Killer)));
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DEBUG({
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errs() << " Removing [" << Start << "," << End << "] from: ";
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interval.print(errs(), tri_);
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@ -845,7 +846,7 @@ void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock *mbb,
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CopyMI = mi;
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ValNo = interval.getNextValue(defIndex, CopyMI, true, VNInfoAllocator);
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MachineInstrIndex killIndex = getMBBEndIdx(mbb).nextSlot();
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MachineInstrIndex killIndex = getNextSlot(getMBBEndIdx(mbb));
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LiveRange LR(defIndex, killIndex, ValNo);
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interval.addRange(LR);
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ValNo->addKill(terminatorGaps[mbb]);
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@ -882,21 +883,21 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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// [defSlot(def), defSlot(def)+1)
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if (MO.isDead()) {
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DEBUG(errs() << " dead");
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end = start.nextSlot();
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end = getNextSlot(start);
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goto exit;
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}
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// If it is not dead on definition, it must be killed by a
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// subsequent instruction. Hence its interval is:
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// [defSlot(def), useSlot(kill)+1)
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baseIndex = baseIndex.nextIndex();
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baseIndex = getNextIndex(baseIndex);
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while (++mi != MBB->end()) {
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while (baseIndex.getVecIndex() < i2miMap_.size() &&
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getInstructionFromIndex(baseIndex) == 0)
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baseIndex = baseIndex.nextIndex();
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baseIndex = getNextIndex(baseIndex);
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if (mi->killsRegister(interval.reg, tri_)) {
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DEBUG(errs() << " killed");
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end = getUseIndex(baseIndex).nextSlot();
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end = getNextSlot(getUseIndex(baseIndex));
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goto exit;
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} else {
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int DefIdx = mi->findRegisterDefOperandIdx(interval.reg, false, tri_);
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@ -912,20 +913,20 @@ void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock *MBB,
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// it. Hence its interval is:
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// [defSlot(def), defSlot(def)+1)
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DEBUG(errs() << " dead");
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end = start.nextSlot();
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end = getNextSlot(start);
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}
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goto exit;
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}
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}
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baseIndex = baseIndex.nextIndex();
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baseIndex = getNextIndex(baseIndex);
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}
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// The only case we should have a dead physreg here without a killing or
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// instruction where we know it's dead is if it is live-in to the function
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// and never used. Another possible case is the implicit use of the
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// physical register has been deleted by two-address pass.
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end = start.nextSlot();
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end = getNextSlot(start);
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exit:
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assert(start < end && "did not find end of interval?");
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@ -986,14 +987,14 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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MachineInstrIndex start = baseIndex;
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while (baseIndex.getVecIndex() < i2miMap_.size() &&
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getInstructionFromIndex(baseIndex) == 0)
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baseIndex = baseIndex.nextIndex();
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baseIndex = getNextIndex(baseIndex);
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MachineInstrIndex end = baseIndex;
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bool SeenDefUse = false;
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while (mi != MBB->end()) {
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if (mi->killsRegister(interval.reg, tri_)) {
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DEBUG(errs() << " killed");
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end = getUseIndex(baseIndex).nextSlot();
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end = getNextSlot(getUseIndex(baseIndex));
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SeenDefUse = true;
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break;
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} else if (mi->modifiesRegister(interval.reg, tri_)) {
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@ -1002,17 +1003,17 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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// it. Hence its interval is:
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// [defSlot(def), defSlot(def)+1)
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DEBUG(errs() << " dead");
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end = getDefIndex(start).nextSlot();
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end = getNextSlot(getDefIndex(start));
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SeenDefUse = true;
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break;
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}
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baseIndex = baseIndex.nextIndex();
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baseIndex = getNextIndex(baseIndex);
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++mi;
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if (mi != MBB->end()) {
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while (baseIndex.getVecIndex() < i2miMap_.size() &&
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getInstructionFromIndex(baseIndex) == 0)
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baseIndex = baseIndex.nextIndex();
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baseIndex = getNextIndex(baseIndex);
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}
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}
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@ -1020,7 +1021,7 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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if (!SeenDefUse) {
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if (isAlias) {
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DEBUG(errs() << " dead");
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end = getDefIndex(MIIdx).nextSlot();
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end = getNextSlot(getDefIndex(MIIdx));
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} else {
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DEBUG(errs() << " live through");
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end = baseIndex;
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@ -1071,7 +1072,7 @@ void LiveIntervals::computeIntervals() {
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// Skip over empty initial indices.
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while (MIIndex.getVecIndex() < i2miMap_.size() &&
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getInstructionFromIndex(MIIndex) == 0)
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MIIndex = MIIndex.nextIndex();
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MIIndex = getNextIndex(MIIndex);
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for (; MI != miEnd; ++MI) {
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DEBUG(errs() << MIIndex << "\t" << *MI);
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@ -1095,12 +1096,12 @@ void LiveIntervals::computeIntervals() {
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Slots = 1;
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while (Slots--)
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MIIndex = MIIndex.nextIndex();
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MIIndex = getNextIndex(MIIndex);
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// Skip over empty indices.
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while (MIIndex.getVecIndex() < i2miMap_.size() &&
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getInstructionFromIndex(MIIndex) == 0)
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MIIndex = MIIndex.nextIndex();
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MIIndex = getNextIndex(MIIndex);
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}
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}
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@ -1708,14 +1709,14 @@ rewriteInstructionForSpills(const LiveInterval &li, const VNInfo *VNI,
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if (HasUse) {
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if (CreatedNewVReg) {
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LiveRange LR(getLoadIndex(index), getUseIndex(index).nextSlot(),
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LiveRange LR(getLoadIndex(index), getNextSlot(getUseIndex(index)),
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nI.getNextValue(MachineInstrIndex(), 0, false,
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VNInfoAllocator));
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DEBUG(errs() << " +" << LR);
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nI.addRange(LR);
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} else {
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// Extend the split live interval to this def / use.
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MachineInstrIndex End = getUseIndex(index).nextSlot();
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MachineInstrIndex End = getNextSlot(getUseIndex(index));
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LiveRange LR(nI.ranges[nI.ranges.size()-1].end, End,
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nI.getValNumInfo(nI.getNumValNums()-1));
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DEBUG(errs() << " +" << LR);
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@ -1792,7 +1793,7 @@ rewriteInstructionsForSpills(const LiveInterval &li, bool TrySplit,
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bool AllCanFold = true;
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unsigned NewVReg = 0;
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MachineInstrIndex start = getBaseIndex(I->start);
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MachineInstrIndex end = getBaseIndex(I->end.prevSlot()).nextIndex();
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MachineInstrIndex end = getNextIndex(getBaseIndex(getPrevSlot(I->end)));
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// First collect all the def / use in this live range that will be rewritten.
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// Make sure they are sorted according to instruction index.
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@ -2351,7 +2352,7 @@ addIntervalsForSpills(const LiveInterval &li,
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if (FoundUse) {
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// Also folded uses, do not issue a load.
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eraseRestoreInfo(Id, index, VReg, RestoreMBBs, RestoreIdxes);
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nI.removeRange(getLoadIndex(index),getUseIndex(index).nextSlot());
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nI.removeRange(getLoadIndex(index), getNextSlot(getUseIndex(index)));
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}
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nI.removeRange(getDefIndex(index), getStoreIndex(index));
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}
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@ -2432,7 +2433,7 @@ addIntervalsForSpills(const LiveInterval &li,
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// If folding is not possible / failed, then tell the spiller to issue a
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// load / rematerialization for us.
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if (Folded)
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nI.removeRange(getLoadIndex(index), getUseIndex(index).nextSlot());
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nI.removeRange(getLoadIndex(index), getNextSlot(getUseIndex(index)));
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else
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vrm.addRestorePoint(VReg, MI);
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}
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@ -2534,7 +2535,7 @@ bool LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li,
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if (pli.liveAt(Index)) {
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vrm.addEmergencySpill(SpillReg, MI);
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MachineInstrIndex StartIdx = getLoadIndex(Index);
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MachineInstrIndex EndIdx = getStoreIndex(Index).nextSlot();
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MachineInstrIndex EndIdx = getNextSlot(getStoreIndex(Index));
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if (pli.isInOneLiveRange(StartIdx, EndIdx)) {
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pli.removeRange(StartIdx, EndIdx);
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Cut = true;
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@ -2554,8 +2555,7 @@ bool LiveIntervals::spillPhysRegAroundRegDefsUses(const LiveInterval &li,
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continue;
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LiveInterval &spli = getInterval(*AS);
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if (spli.liveAt(Index))
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spli.removeRange(getLoadIndex(Index),
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getStoreIndex(Index).nextSlot());
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spli.removeRange(getLoadIndex(Index), getNextSlot(getStoreIndex(Index)));
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}
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}
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}
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@ -2572,7 +2572,7 @@ LiveRange LiveIntervals::addLiveRangeToEndOfBlock(unsigned reg,
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VN->kills.push_back(terminatorGaps[startInst->getParent()]);
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LiveRange LR(
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MachineInstrIndex(getInstructionIndex(startInst), MachineInstrIndex::DEF),
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getMBBEndIdx(startInst->getParent()).nextSlot(), VN);
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getNextSlot(getMBBEndIdx(startInst->getParent())), VN);
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Interval.addRange(LR);
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return LR;
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