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[PowerPC] Mark many instructions as commutative
I'm under the impression that we used to infer the isCommutable flag from the instruction-associated pattern. Regardless, we don't seem to do this (at least by default) any more. I've gone through all of our instruction definitions, and marked as commutative all of those that should be trivial to commute (by exchanging the first two operands). There has been special code for the RL* instructions, and that's not changed. Before this change, we had the following commutative instructions: RLDIMI RLDIMIo RLWIMI RLWIMI8 RLWIMI8o RLWIMIo XSADDDP XSMULDP XVADDDP XVADDSP XVMULDP XVMULSP After: ADD4 ADD4o ADD8 ADD8o ADDC ADDC8 ADDC8o ADDCo ADDE ADDE8 ADDE8o ADDEo AND AND8 AND8o ANDo CRAND CREQV CRNAND CRNOR CROR CRXOR EQV EQV8 EQV8o EQVo FADD FADDS FADDSo FADDo FMADD FMADDS FMADDSo FMADDo FMSUB FMSUBS FMSUBSo FMSUBo FMUL FMULS FMULSo FMULo FNMADD FNMADDS FNMADDSo FNMADDo FNMSUB FNMSUBS FNMSUBSo FNMSUBo MULHD MULHDU MULHDUo MULHDo MULHW MULHWU MULHWUo MULHWo MULLD MULLDo MULLW MULLWo NAND NAND8 NAND8o NANDo NOR NOR8 NOR8o NORo OR OR8 OR8o ORo RLDIMI RLDIMIo RLWIMI RLWIMI8 RLWIMI8o RLWIMIo VADDCUW VADDFP VADDSBS VADDSHS VADDSWS VADDUBM VADDUBS VADDUHM VADDUHS VADDUWM VADDUWS VAND VAVGSB VAVGSH VAVGSW VAVGUB VAVGUH VAVGUW VMADDFP VMAXFP VMAXSB VMAXSH VMAXSW VMAXUB VMAXUH VMAXUW VMHADDSHS VMHRADDSHS VMINFP VMINSB VMINSH VMINSW VMINUB VMINUH VMINUW VMLADDUHM VMULESB VMULESH VMULEUB VMULEUH VMULOSB VMULOSH VMULOUB VMULOUH VNMSUBFP VOR VXOR XOR XOR8 XOR8o XORo XSADDDP XSMADDADP XSMAXDP XSMINDP XSMSUBADP XSMULDP XSNMADDADP XSNMSUBADP XVADDDP XVADDSP XVMADDADP XVMADDASP XVMAXDP XVMAXSP XVMINDP XVMINSP XVMSUBADP XVMSUBASP XVMULDP XVMULSP XVNMADDADP XVNMADDASP XVNMSUBADP XVNMSUBASP XXLAND XXLNOR XXLOR XXLXOR This is a by-inspection change, and I'm not sure how to write a reliable test case. I would like advice on this, however. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204609 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Hal Finkel
parent
67db74e02c
commit
38a80e9b21
@ -376,30 +376,36 @@ def LIS8 : DForm_2_r0<15, (outs g8rc:$rD), (ins s17imm64:$imm),
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}
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// Logical ops.
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let isCommutable = 1 in {
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defm NAND8: XForm_6r<31, 476, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB),
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"nand", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i64:$rA, (not (and i64:$rS, i64:$rB)))]>;
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defm AND8 : XForm_6r<31, 28, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB),
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"and", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i64:$rA, (and i64:$rS, i64:$rB))]>;
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} // isCommutable
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defm ANDC8: XForm_6r<31, 60, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB),
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"andc", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i64:$rA, (and i64:$rS, (not i64:$rB)))]>;
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let isCommutable = 1 in {
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defm OR8 : XForm_6r<31, 444, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB),
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"or", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i64:$rA, (or i64:$rS, i64:$rB))]>;
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defm NOR8 : XForm_6r<31, 124, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB),
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"nor", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i64:$rA, (not (or i64:$rS, i64:$rB)))]>;
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} // isCommutable
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defm ORC8 : XForm_6r<31, 412, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB),
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"orc", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i64:$rA, (or i64:$rS, (not i64:$rB)))]>;
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let isCommutable = 1 in {
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defm EQV8 : XForm_6r<31, 284, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB),
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"eqv", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i64:$rA, (not (xor i64:$rS, i64:$rB)))]>;
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defm XOR8 : XForm_6r<31, 316, (outs g8rc:$rA), (ins g8rc:$rS, g8rc:$rB),
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"xor", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i64:$rA, (xor i64:$rS, i64:$rB))]>;
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} // let isCommutable = 1
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// Logical ops with immediate.
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let Defs = [CR0] in {
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@ -425,6 +431,7 @@ def XORIS8 : DForm_4<27, (outs g8rc:$dst), (ins g8rc:$src1, u16imm64:$src2),
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"xoris $dst, $src1, $src2", IIC_IntSimple,
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[(set i64:$dst, (xor i64:$src1, imm16ShiftedZExt:$src2))]>;
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let isCommutable = 1 in
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defm ADD8 : XOForm_1r<31, 266, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
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"add", "$rT, $rA, $rB", IIC_IntSimple,
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[(set i64:$rT, (add i64:$rA, i64:$rB))]>;
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@ -434,10 +441,12 @@ def ADD8TLS : XOForm_1<31, 266, 0, (outs g8rc:$rT), (ins g8rc:$rA, tlsreg:$rB),
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"add $rT, $rA, $rB", IIC_IntSimple,
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[(set i64:$rT, (add i64:$rA, tglobaltlsaddr:$rB))]>;
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let isCommutable = 1 in
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defm ADDC8 : XOForm_1rc<31, 10, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
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"addc", "$rT, $rA, $rB", IIC_IntGeneral,
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[(set i64:$rT, (addc i64:$rA, i64:$rB))]>,
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PPC970_DGroup_Cracked;
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let Defs = [CARRY] in
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def ADDIC8 : DForm_2<12, (outs g8rc:$rD), (ins g8rc:$rA, s16imm64:$imm),
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"addic $rD, $rA, $imm", IIC_IntGeneral,
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@ -465,6 +474,7 @@ defm NEG8 : XOForm_3r<31, 104, 0, (outs g8rc:$rT), (ins g8rc:$rA),
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"neg", "$rT, $rA", IIC_IntSimple,
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[(set i64:$rT, (ineg i64:$rA))]>;
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let Uses = [CARRY] in {
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let isCommutable = 1 in
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defm ADDE8 : XOForm_1rc<31, 138, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
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"adde", "$rT, $rA, $rB", IIC_IntGeneral,
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[(set i64:$rT, (adde i64:$rA, i64:$rB))]>;
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@ -493,12 +503,14 @@ let isAsmParserOnly = 1 in
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def ADD8TLS_ : XOForm_1<31, 266, 0, (outs g8rc:$rT), (ins g8rc:$rA, tlsreg:$rB),
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"add $rT, $rA, $rB", IIC_IntSimple, []>;
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let isCommutable = 1 in {
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defm MULHD : XOForm_1r<31, 73, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
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"mulhd", "$rT, $rA, $rB", IIC_IntMulHW,
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[(set i64:$rT, (mulhs i64:$rA, i64:$rB))]>;
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defm MULHDU : XOForm_1r<31, 9, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
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"mulhdu", "$rT, $rA, $rB", IIC_IntMulHWU,
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[(set i64:$rT, (mulhu i64:$rA, i64:$rB))]>;
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} // isCommutable
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}
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} // Interpretation64Bit
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@ -575,6 +587,7 @@ defm DIVDU : XOForm_1r<31, 457, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
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"divdu", "$rT, $rA, $rB", IIC_IntDivD,
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[(set i64:$rT, (udiv i64:$rA, i64:$rB))]>, isPPC64,
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PPC970_DGroup_First, PPC970_DGroup_Cracked;
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let isCommutable = 1 in
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defm MULLD : XOForm_1r<31, 233, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB),
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"mulld", "$rT, $rA, $rB", IIC_IntMulHD,
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[(set i64:$rT, (mul i64:$rA, i64:$rB))]>, isPPC64;
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@ -324,6 +324,7 @@ def STVXL : XForm_8<31, 487, (outs), (ins vrrc:$rS, memrr:$dst),
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let PPC970_Unit = 5 in { // VALU Operations.
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// VA-Form instructions. 3-input AltiVec ops.
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let isCommutable = 1 in {
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def VMADDFP : VAForm_1<46, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vC, vrrc:$vB),
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"vmaddfp $vD, $vA, $vC, $vB", IIC_VecFP,
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[(set v4f32:$vD,
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@ -333,12 +334,13 @@ def VMADDFP : VAForm_1<46, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vC, vrrc:$vB),
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def VNMSUBFP: VAForm_1<47, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vC, vrrc:$vB),
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"vnmsubfp $vD, $vA, $vC, $vB", IIC_VecFP,
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[(set v4f32:$vD, (fneg (fma v4f32:$vA, v4f32:$vC,
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(fneg v4f32:$vB))))]>;
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(fneg v4f32:$vB))))]>;
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def VMHADDSHS : VA1a_Int_Ty<32, "vmhaddshs", int_ppc_altivec_vmhaddshs, v8i16>;
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def VMHRADDSHS : VA1a_Int_Ty<33, "vmhraddshs", int_ppc_altivec_vmhraddshs,
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v8i16>;
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def VMLADDUHM : VA1a_Int_Ty<34, "vmladduhm", int_ppc_altivec_vmladduhm, v8i16>;
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} // isCommutable
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def VPERM : VA1a_Int_Ty3<43, "vperm", int_ppc_altivec_vperm,
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v4i32, v4i32, v16i8>;
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@ -351,6 +353,7 @@ def VSLDOI : VAForm_2<44, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, u5imm:$SH),
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(vsldoi_shuffle:$SH v16i8:$vA, v16i8:$vB))]>;
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// VX-Form instructions. AltiVec arithmetic ops.
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let isCommutable = 1 in {
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def VADDFP : VXForm_1<10, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
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"vaddfp $vD, $vA, $vB", IIC_VecFP,
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[(set v4f32:$vD, (fadd v4f32:$vA, v4f32:$vB))]>;
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@ -372,8 +375,9 @@ def VADDSWS : VX1_Int_Ty<896, "vaddsws", int_ppc_altivec_vaddsws, v4i32>;
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def VADDUBS : VX1_Int_Ty<512, "vaddubs", int_ppc_altivec_vaddubs, v16i8>;
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def VADDUHS : VX1_Int_Ty<576, "vadduhs", int_ppc_altivec_vadduhs, v8i16>;
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def VADDUWS : VX1_Int_Ty<640, "vadduws", int_ppc_altivec_vadduws, v4i32>;
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} // isCommutable
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let isCommutable = 1 in
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def VAND : VXForm_1<1028, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
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"vand $vD, $vA, $vB", IIC_VecFP,
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[(set v4i32:$vD, (and v4i32:$vA, v4i32:$vB))]>;
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@ -423,6 +427,7 @@ def VCTSXS_0 : VXForm_1<970, (outs vrrc:$vD), (ins vrrc:$vB),
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def VEXPTEFP : VX2_Int_SP<394, "vexptefp", int_ppc_altivec_vexptefp>;
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def VLOGEFP : VX2_Int_SP<458, "vlogefp", int_ppc_altivec_vlogefp>;
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let isCommutable = 1 in {
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def VAVGSB : VX1_Int_Ty<1282, "vavgsb", int_ppc_altivec_vavgsb, v16i8>;
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def VAVGSH : VX1_Int_Ty<1346, "vavgsh", int_ppc_altivec_vavgsh, v8i16>;
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def VAVGSW : VX1_Int_Ty<1410, "vavgsw", int_ppc_altivec_vavgsw, v4i32>;
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@ -444,6 +449,7 @@ def VMINSW : VX1_Int_Ty< 898, "vminsw", int_ppc_altivec_vminsw, v4i32>;
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def VMINUB : VX1_Int_Ty< 514, "vminub", int_ppc_altivec_vminub, v16i8>;
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def VMINUH : VX1_Int_Ty< 578, "vminuh", int_ppc_altivec_vminuh, v8i16>;
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def VMINUW : VX1_Int_Ty< 642, "vminuw", int_ppc_altivec_vminuw, v4i32>;
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} // isCommutable
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def VMRGHB : VXForm_1< 12, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
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"vmrghb $vD, $vA, $vB", IIC_VecFP,
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@ -477,6 +483,7 @@ def VMSUMUHM : VA1a_Int_Ty3<38, "vmsumuhm", int_ppc_altivec_vmsumuhm,
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def VMSUMUHS : VA1a_Int_Ty3<39, "vmsumuhs", int_ppc_altivec_vmsumuhs,
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v4i32, v8i16, v4i32>;
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let isCommutable = 1 in {
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def VMULESB : VX1_Int_Ty2<776, "vmulesb", int_ppc_altivec_vmulesb,
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v8i16, v16i8>;
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def VMULESH : VX1_Int_Ty2<840, "vmulesh", int_ppc_altivec_vmulesh,
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@ -493,6 +500,7 @@ def VMULOUB : VX1_Int_Ty2< 8, "vmuloub", int_ppc_altivec_vmuloub,
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v8i16, v16i8>;
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def VMULOUH : VX1_Int_Ty2< 72, "vmulouh", int_ppc_altivec_vmulouh,
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v4i32, v8i16>;
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} // isCommutable
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def VREFP : VX2_Int_SP<266, "vrefp", int_ppc_altivec_vrefp>;
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def VRFIM : VX2_Int_SP<714, "vrfim", int_ppc_altivec_vrfim>;
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@ -537,12 +545,14 @@ def VNOR : VXForm_1<1284, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
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"vnor $vD, $vA, $vB", IIC_VecFP,
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[(set v4i32:$vD, (vnot_ppc (or v4i32:$vA,
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v4i32:$vB)))]>;
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let isCommutable = 1 in {
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def VOR : VXForm_1<1156, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
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"vor $vD, $vA, $vB", IIC_VecFP,
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[(set v4i32:$vD, (or v4i32:$vA, v4i32:$vB))]>;
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def VXOR : VXForm_1<1220, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
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"vxor $vD, $vA, $vB", IIC_VecFP,
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[(set v4i32:$vD, (xor v4i32:$vA, v4i32:$vB))]>;
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} // isCommutable
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def VRLB : VX1_Int_Ty< 4, "vrlb", int_ppc_altivec_vrlb, v16i8>;
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def VRLH : VX1_Int_Ty< 68, "vrlh", int_ppc_altivec_vrlh, v8i16>;
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@ -1731,30 +1731,36 @@ let isCompare = 1, neverHasSideEffects = 1 in {
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}
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let PPC970_Unit = 1, neverHasSideEffects = 1 in { // FXU Operations.
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let isCommutable = 1 in {
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defm NAND : XForm_6r<31, 476, (outs gprc:$rA), (ins gprc:$rS, gprc:$rB),
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"nand", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i32:$rA, (not (and i32:$rS, i32:$rB)))]>;
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defm AND : XForm_6r<31, 28, (outs gprc:$rA), (ins gprc:$rS, gprc:$rB),
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"and", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i32:$rA, (and i32:$rS, i32:$rB))]>;
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} // isCommutable
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defm ANDC : XForm_6r<31, 60, (outs gprc:$rA), (ins gprc:$rS, gprc:$rB),
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"andc", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i32:$rA, (and i32:$rS, (not i32:$rB)))]>;
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let isCommutable = 1 in {
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defm OR : XForm_6r<31, 444, (outs gprc:$rA), (ins gprc:$rS, gprc:$rB),
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"or", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i32:$rA, (or i32:$rS, i32:$rB))]>;
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defm NOR : XForm_6r<31, 124, (outs gprc:$rA), (ins gprc:$rS, gprc:$rB),
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"nor", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i32:$rA, (not (or i32:$rS, i32:$rB)))]>;
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} // isCommutable
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defm ORC : XForm_6r<31, 412, (outs gprc:$rA), (ins gprc:$rS, gprc:$rB),
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"orc", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i32:$rA, (or i32:$rS, (not i32:$rB)))]>;
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let isCommutable = 1 in {
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defm EQV : XForm_6r<31, 284, (outs gprc:$rA), (ins gprc:$rS, gprc:$rB),
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"eqv", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i32:$rA, (not (xor i32:$rS, i32:$rB)))]>;
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defm XOR : XForm_6r<31, 316, (outs gprc:$rA), (ins gprc:$rS, gprc:$rB),
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"xor", "$rA, $rS, $rB", IIC_IntSimple,
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[(set i32:$rA, (xor i32:$rS, i32:$rB))]>;
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} // isCommutable
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defm SLW : XForm_6r<31, 24, (outs gprc:$rA), (ins gprc:$rS, gprc:$rB),
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"slw", "$rA, $rS, $rB", IIC_IntGeneral,
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[(set i32:$rA, (PPCshl i32:$rS, i32:$rB))]>;
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@ -1918,6 +1924,7 @@ def MCRF : XLForm_3<19, 0, (outs crrc:$BF), (ins crrc:$BFA),
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"mcrf $BF, $BFA", IIC_BrMCR>,
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PPC970_DGroup_First, PPC970_Unit_CRU;
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let isCommutable = 1 in {
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def CRAND : XLForm_1<19, 257, (outs crbitrc:$CRD),
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(ins crbitrc:$CRA, crbitrc:$CRB),
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"crand $CRD, $CRA, $CRB", IIC_BrCR,
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@ -1947,6 +1954,7 @@ def CREQV : XLForm_1<19, 289, (outs crbitrc:$CRD),
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(ins crbitrc:$CRA, crbitrc:$CRB),
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"creqv $CRD, $CRA, $CRB", IIC_BrCR,
|
||||
[(set i1:$CRD, (not (xor i1:$CRA, i1:$CRB)))]>;
|
||||
} // isCommutable
|
||||
|
||||
def CRANDC : XLForm_1<19, 129, (outs crbitrc:$CRD),
|
||||
(ins crbitrc:$CRA, crbitrc:$CRB),
|
||||
@ -2098,7 +2106,7 @@ let Uses = [RM] in {
|
||||
|
||||
let PPC970_Unit = 1, neverHasSideEffects = 1 in { // FXU Operations.
|
||||
// XO-Form instructions. Arithmetic instructions that can set overflow bit
|
||||
//
|
||||
let isCommutable = 1 in
|
||||
defm ADD4 : XOForm_1r<31, 266, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
|
||||
"add", "$rT, $rA, $rB", IIC_IntSimple,
|
||||
[(set i32:$rT, (add i32:$rA, i32:$rB))]>;
|
||||
@ -2106,10 +2114,12 @@ let isCodeGenOnly = 1 in
|
||||
def ADD4TLS : XOForm_1<31, 266, 0, (outs gprc:$rT), (ins gprc:$rA, tlsreg32:$rB),
|
||||
"add $rT, $rA, $rB", IIC_IntSimple,
|
||||
[(set i32:$rT, (add i32:$rA, tglobaltlsaddr:$rB))]>;
|
||||
let isCommutable = 1 in
|
||||
defm ADDC : XOForm_1rc<31, 10, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
|
||||
"addc", "$rT, $rA, $rB", IIC_IntGeneral,
|
||||
[(set i32:$rT, (addc i32:$rA, i32:$rB))]>,
|
||||
PPC970_DGroup_Cracked;
|
||||
|
||||
defm DIVW : XOForm_1r<31, 491, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
|
||||
"divw", "$rT, $rA, $rB", IIC_IntDivW,
|
||||
[(set i32:$rT, (sdiv i32:$rA, i32:$rB))]>,
|
||||
@ -2118,6 +2128,7 @@ defm DIVWU : XOForm_1r<31, 459, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
|
||||
"divwu", "$rT, $rA, $rB", IIC_IntDivW,
|
||||
[(set i32:$rT, (udiv i32:$rA, i32:$rB))]>,
|
||||
PPC970_DGroup_First, PPC970_DGroup_Cracked;
|
||||
let isCommutable = 1 in {
|
||||
defm MULHW : XOForm_1r<31, 75, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
|
||||
"mulhw", "$rT, $rA, $rB", IIC_IntMulHW,
|
||||
[(set i32:$rT, (mulhs i32:$rA, i32:$rB))]>;
|
||||
@ -2127,6 +2138,7 @@ defm MULHWU : XOForm_1r<31, 11, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
|
||||
defm MULLW : XOForm_1r<31, 235, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
|
||||
"mullw", "$rT, $rA, $rB", IIC_IntMulHW,
|
||||
[(set i32:$rT, (mul i32:$rA, i32:$rB))]>;
|
||||
} // isCommutable
|
||||
defm SUBF : XOForm_1r<31, 40, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
|
||||
"subf", "$rT, $rA, $rB", IIC_IntGeneral,
|
||||
[(set i32:$rT, (sub i32:$rB, i32:$rA))]>;
|
||||
@ -2138,6 +2150,7 @@ defm NEG : XOForm_3r<31, 104, 0, (outs gprc:$rT), (ins gprc:$rA),
|
||||
"neg", "$rT, $rA", IIC_IntSimple,
|
||||
[(set i32:$rT, (ineg i32:$rA))]>;
|
||||
let Uses = [CARRY] in {
|
||||
let isCommutable = 1 in
|
||||
defm ADDE : XOForm_1rc<31, 138, 0, (outs gprc:$rT), (ins gprc:$rA, gprc:$rB),
|
||||
"adde", "$rT, $rA, $rB", IIC_IntGeneral,
|
||||
[(set i32:$rT, (adde i32:$rA, i32:$rB))]>;
|
||||
@ -2164,6 +2177,7 @@ defm SUBFZE : XOForm_3rc<31, 200, 0, (outs gprc:$rT), (ins gprc:$rA),
|
||||
//
|
||||
let PPC970_Unit = 3, neverHasSideEffects = 1 in { // FPU Operations.
|
||||
let Uses = [RM] in {
|
||||
let isCommutable = 1 in {
|
||||
defm FMADD : AForm_1r<63, 29,
|
||||
(outs f8rc:$FRT), (ins f8rc:$FRA, f8rc:$FRC, f8rc:$FRB),
|
||||
"fmadd", "$FRT, $FRA, $FRC, $FRB", IIC_FPFused,
|
||||
@ -2202,6 +2216,7 @@ let Uses = [RM] in {
|
||||
"fnmsubs", "$FRT, $FRA, $FRC, $FRB", IIC_FPGeneral,
|
||||
[(set f32:$FRT, (fneg (fma f32:$FRA, f32:$FRC,
|
||||
(fneg f32:$FRB))))]>;
|
||||
} // isCommutable
|
||||
}
|
||||
// FSEL is artificially split into 4 and 8-byte forms for the result. To avoid
|
||||
// having 4 of these, force the comparison to always be an 8-byte double (code
|
||||
@ -2217,6 +2232,7 @@ defm FSELS : AForm_1r<63, 23,
|
||||
"fsel", "$FRT, $FRA, $FRC, $FRB", IIC_FPGeneral,
|
||||
[(set f32:$FRT, (PPCfsel f64:$FRA, f32:$FRC, f32:$FRB))]>;
|
||||
let Uses = [RM] in {
|
||||
let isCommutable = 1 in {
|
||||
defm FADD : AForm_2r<63, 21,
|
||||
(outs f8rc:$FRT), (ins f8rc:$FRA, f8rc:$FRB),
|
||||
"fadd", "$FRT, $FRA, $FRB", IIC_FPAddSub,
|
||||
@ -2225,6 +2241,7 @@ let Uses = [RM] in {
|
||||
(outs f4rc:$FRT), (ins f4rc:$FRA, f4rc:$FRB),
|
||||
"fadds", "$FRT, $FRA, $FRB", IIC_FPGeneral,
|
||||
[(set f32:$FRT, (fadd f32:$FRA, f32:$FRB))]>;
|
||||
} // isCommutable
|
||||
defm FDIV : AForm_2r<63, 18,
|
||||
(outs f8rc:$FRT), (ins f8rc:$FRA, f8rc:$FRB),
|
||||
"fdiv", "$FRT, $FRA, $FRB", IIC_FPDivD,
|
||||
@ -2233,6 +2250,7 @@ let Uses = [RM] in {
|
||||
(outs f4rc:$FRT), (ins f4rc:$FRA, f4rc:$FRB),
|
||||
"fdivs", "$FRT, $FRA, $FRB", IIC_FPDivS,
|
||||
[(set f32:$FRT, (fdiv f32:$FRA, f32:$FRB))]>;
|
||||
let isCommutable = 1 in {
|
||||
defm FMUL : AForm_3r<63, 25,
|
||||
(outs f8rc:$FRT), (ins f8rc:$FRA, f8rc:$FRC),
|
||||
"fmul", "$FRT, $FRA, $FRC", IIC_FPFused,
|
||||
@ -2241,6 +2259,7 @@ let Uses = [RM] in {
|
||||
(outs f4rc:$FRT), (ins f4rc:$FRA, f4rc:$FRC),
|
||||
"fmuls", "$FRT, $FRA, $FRC", IIC_FPGeneral,
|
||||
[(set f32:$FRT, (fmul f32:$FRA, f32:$FRC))]>;
|
||||
} // isCommutable
|
||||
defm FSUB : AForm_2r<63, 20,
|
||||
(outs f8rc:$FRT), (ins f8rc:$FRA, f8rc:$FRB),
|
||||
"fsub", "$FRT, $FRA, $FRB", IIC_FPAddSub,
|
||||
|
||||
@ -127,6 +127,7 @@ let Uses = [RM] in {
|
||||
[(set v4f32:$XT, (fsub v4f32:$XA, v4f32:$XB))]>;
|
||||
|
||||
// FMA Instructions
|
||||
let isCommutable = 1 in
|
||||
def XSMADDADP : XX3Form<60, 33,
|
||||
(outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
|
||||
"xsmaddadp $XT, $XA, $XB", IIC_VecFP,
|
||||
@ -140,6 +141,7 @@ let Uses = [RM] in {
|
||||
// no further uses. We probably want to do this after scheduling but before
|
||||
// register allocation.
|
||||
|
||||
let isCommutable = 1 in
|
||||
def XSMSUBADP : XX3Form<60, 49,
|
||||
(outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
|
||||
"xsmsubadp $XT, $XA, $XB", IIC_VecFP,
|
||||
@ -150,6 +152,7 @@ let Uses = [RM] in {
|
||||
"xsmsubmdp $XT, $XA, $XB", IIC_VecFP, []>,
|
||||
RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">;
|
||||
|
||||
let isCommutable = 1 in
|
||||
def XSNMADDADP : XX3Form<60, 161,
|
||||
(outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
|
||||
"xsnmaddadp $XT, $XA, $XB", IIC_VecFP,
|
||||
@ -160,6 +163,7 @@ let Uses = [RM] in {
|
||||
"xsnmaddmdp $XT, $XA, $XB", IIC_VecFP, []>,
|
||||
RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">;
|
||||
|
||||
let isCommutable = 1 in
|
||||
def XSNMSUBADP : XX3Form<60, 177,
|
||||
(outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
|
||||
"xsnmsubadp $XT, $XA, $XB", IIC_VecFP,
|
||||
@ -170,6 +174,7 @@ let Uses = [RM] in {
|
||||
"xsnmsubmdp $XT, $XA, $XB", IIC_VecFP, []>,
|
||||
RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">;
|
||||
|
||||
let isCommutable = 1 in
|
||||
def XVMADDADP : XX3Form<60, 97,
|
||||
(outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
|
||||
"xvmaddadp $XT, $XA, $XB", IIC_VecFP,
|
||||
@ -180,6 +185,7 @@ let Uses = [RM] in {
|
||||
"xvmaddmdp $XT, $XA, $XB", IIC_VecFP, []>,
|
||||
RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">;
|
||||
|
||||
let isCommutable = 1 in
|
||||
def XVMADDASP : XX3Form<60, 65,
|
||||
(outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
|
||||
"xvmaddasp $XT, $XA, $XB", IIC_VecFP,
|
||||
@ -190,6 +196,7 @@ let Uses = [RM] in {
|
||||
"xvmaddmsp $XT, $XA, $XB", IIC_VecFP, []>,
|
||||
RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">;
|
||||
|
||||
let isCommutable = 1 in
|
||||
def XVMSUBADP : XX3Form<60, 113,
|
||||
(outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
|
||||
"xvmsubadp $XT, $XA, $XB", IIC_VecFP,
|
||||
@ -200,6 +207,7 @@ let Uses = [RM] in {
|
||||
"xvmsubmdp $XT, $XA, $XB", IIC_VecFP, []>,
|
||||
RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">;
|
||||
|
||||
let isCommutable = 1 in
|
||||
def XVMSUBASP : XX3Form<60, 81,
|
||||
(outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
|
||||
"xvmsubasp $XT, $XA, $XB", IIC_VecFP,
|
||||
@ -210,6 +218,7 @@ let Uses = [RM] in {
|
||||
"xvmsubmsp $XT, $XA, $XB", IIC_VecFP, []>,
|
||||
RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">;
|
||||
|
||||
let isCommutable = 1 in
|
||||
def XVNMADDADP : XX3Form<60, 225,
|
||||
(outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
|
||||
"xvnmaddadp $XT, $XA, $XB", IIC_VecFP,
|
||||
@ -220,6 +229,7 @@ let Uses = [RM] in {
|
||||
"xvnmaddmdp $XT, $XA, $XB", IIC_VecFP, []>,
|
||||
RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">;
|
||||
|
||||
let isCommutable = 1 in
|
||||
def XVNMADDASP : XX3Form<60, 193,
|
||||
(outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
|
||||
"xvnmaddasp $XT, $XA, $XB", IIC_VecFP,
|
||||
@ -230,6 +240,7 @@ let Uses = [RM] in {
|
||||
"xvnmaddmsp $XT, $XA, $XB", IIC_VecFP, []>,
|
||||
RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">;
|
||||
|
||||
let isCommutable = 1 in
|
||||
def XVNMSUBADP : XX3Form<60, 241,
|
||||
(outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
|
||||
"xvnmsubadp $XT, $XA, $XB", IIC_VecFP,
|
||||
@ -240,6 +251,7 @@ let Uses = [RM] in {
|
||||
"xvnmsubmdp $XT, $XA, $XB", IIC_VecFP, []>,
|
||||
RegConstraint<"$XTi = $XT">, NoEncode<"$XTi">;
|
||||
|
||||
let isCommutable = 1 in
|
||||
def XVNMSUBASP : XX3Form<60, 209,
|
||||
(outs vsrc:$XT), (ins vsrc:$XTi, vsrc:$XA, vsrc:$XB),
|
||||
"xvnmsubasp $XT, $XA, $XB", IIC_VecFP,
|
||||
@ -561,6 +573,7 @@ let Uses = [RM] in {
|
||||
[(set v4f32:$XT, (ftrunc v4f32:$XB))]>;
|
||||
|
||||
// Max/Min Instructions
|
||||
let isCommutable = 1 in {
|
||||
def XSMAXDP : XX3Form<60, 160,
|
||||
(outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
|
||||
"xsmaxdp $XT, $XA, $XB", IIC_VecFP, []>;
|
||||
@ -581,15 +594,18 @@ let Uses = [RM] in {
|
||||
def XVMINSP : XX3Form<60, 200,
|
||||
(outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
|
||||
"xvminsp $XT, $XA, $XB", IIC_VecFP, []>;
|
||||
} // isCommutable
|
||||
} // Uses = [RM]
|
||||
|
||||
// Logical Instructions
|
||||
let isCommutable = 1 in
|
||||
def XXLAND : XX3Form<60, 130,
|
||||
(outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
|
||||
"xxland $XT, $XA, $XB", IIC_VecGeneral, []>;
|
||||
def XXLANDC : XX3Form<60, 138,
|
||||
(outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
|
||||
"xxlandc $XT, $XA, $XB", IIC_VecGeneral, []>;
|
||||
let isCommutable = 1 in {
|
||||
def XXLNOR : XX3Form<60, 162,
|
||||
(outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
|
||||
"xxlnor $XT, $XA, $XB", IIC_VecGeneral, []>;
|
||||
@ -599,6 +615,7 @@ let Uses = [RM] in {
|
||||
def XXLXOR : XX3Form<60, 154,
|
||||
(outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB),
|
||||
"xxlxor $XT, $XA, $XB", IIC_VecGeneral, []>;
|
||||
} // isCommutable
|
||||
|
||||
// Permutation Instructions
|
||||
def XXMRGHW : XX3Form<60, 18,
|
||||
|
||||
Loading…
Reference in New Issue
Block a user