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Spill slots cannot alias.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84432 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2009-10-18 19:58:47 +00:00
parent d36076e4a3
commit 38bdfc69cb
4 changed files with 17 additions and 10 deletions
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2
include/llvm/CodeGen/PseudoSourceValue.h
View File

@ -41,7 +41,7 @@ namespace llvm {
/// isAliased - Test whether the memory pointed to by this
/// PseudoSourceValue may also be pointed to by an LLVM IR Value.
virtual bool isAliased() const;
virtual bool isAliased(const MachineFrameInfo *) const;
/// classof - Methods for support type inquiry through isa, cast, and
/// dyn_cast:

11
lib/CodeGen/PseudoSourceValue.cpp
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@ -63,7 +63,7 @@ namespace {
virtual bool isConstant(const MachineFrameInfo *MFI) const;
virtual bool isAliased() const;
virtual bool isAliased(const MachineFrameInfo *MFI) const;
virtual void printCustom(raw_ostream &OS) const {
OS << "FixedStack" << FI;
@ -91,7 +91,7 @@ bool PseudoSourceValue::isConstant(const MachineFrameInfo *) const {
return false;
}
bool PseudoSourceValue::isAliased() const {
bool PseudoSourceValue::isAliased(const MachineFrameInfo *MFI) const {
if (this == getStack() ||
this == getGOT() ||
this == getConstantPool() ||
@ -105,9 +105,12 @@ bool FixedStackPseudoSourceValue::isConstant(const MachineFrameInfo *MFI) const{
return MFI && MFI->isImmutableObjectIndex(FI);
}
bool FixedStackPseudoSourceValue::isAliased() const{
bool FixedStackPseudoSourceValue::isAliased(const MachineFrameInfo *MFI) const {
// Negative frame indices are used for special things that don't
// appear in LLVM IR. Non-negative indices may be used for things
// like static allocas.
return FI >= 0;
if (!MFI)
return FI >= 0;
// Spill slots should not alias others.
return !MFI->isFixedObjectIndex(FI) && !MFI->isSpillSlotObjectIndex(FI);
}

13
lib/CodeGen/ScheduleDAGInstrs.cpp
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@ -32,7 +32,9 @@ using namespace llvm;
ScheduleDAGInstrs::ScheduleDAGInstrs(MachineFunction &mf,
const MachineLoopInfo &mli,
const MachineDominatorTree &mdt)
: ScheduleDAG(mf), MLI(mli), MDT(mdt), LoopRegs(MLI, MDT) {}
: ScheduleDAG(mf), MLI(mli), MDT(mdt), LoopRegs(MLI, MDT) {
MFI = mf.getFrameInfo();
}
/// Run - perform scheduling.
///
@ -95,7 +97,8 @@ static const Value *getUnderlyingObject(const Value *V) {
/// getUnderlyingObjectForInstr - If this machine instr has memory reference
/// information and it can be tracked to a normal reference to a known
/// object, return the Value for that object. Otherwise return null.
static const Value *getUnderlyingObjectForInstr(const MachineInstr *MI) {
static const Value *getUnderlyingObjectForInstr(const MachineInstr *MI,
const MachineFrameInfo *MFI) {
if (!MI->hasOneMemOperand() ||
!(*MI->memoperands_begin())->getValue() ||
(*MI->memoperands_begin())->isVolatile())
@ -110,7 +113,7 @@ static const Value *getUnderlyingObjectForInstr(const MachineInstr *MI) {
// For now, ignore PseudoSourceValues which may alias LLVM IR values
// because the code that uses this function has no way to cope with
// such aliases.
if (PSV->isAliased())
if (PSV->isAliased(MFI))
return 0;
return V;
}
@ -353,7 +356,7 @@ void ScheduleDAGInstrs::BuildSchedGraph(AliasAnalysis *AA) {
// Unknown memory accesses. Assume the worst.
ChainMMO = 0;
} else if (TID.mayStore()) {
if (const Value *V = getUnderlyingObjectForInstr(MI)) {
if (const Value *V = getUnderlyingObjectForInstr(MI, MFI)) {
// A store to a specific PseudoSourceValue. Add precise dependencies.
// Handle the def in MemDefs, if there is one.
std::map<const Value *, SUnit *>::iterator I = MemDefs.find(V);
@ -386,7 +389,7 @@ void ScheduleDAGInstrs::BuildSchedGraph(AliasAnalysis *AA) {
} else if (TID.mayLoad()) {
if (MI->isInvariantLoad(AA)) {
// Invariant load, no chain dependencies needed!
} else if (const Value *V = getUnderlyingObjectForInstr(MI)) {
} else if (const Value *V = getUnderlyingObjectForInstr(MI, MFI)) {
// A load from a specific PseudoSourceValue. Add precise dependencies.
std::map<const Value *, SUnit *>::iterator I = MemDefs.find(V);
if (I != MemDefs.end())

1
lib/CodeGen/ScheduleDAGInstrs.h
View File

@ -98,6 +98,7 @@ namespace llvm {
class VISIBILITY_HIDDEN ScheduleDAGInstrs : public ScheduleDAG {
const MachineLoopInfo &MLI;
const MachineDominatorTree &MDT;
const MachineFrameInfo *MFI;
/// Defs, Uses - Remember where defs and uses of each physical register
/// are as we iterate upward through the instructions. This is allocated