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Use MCPhysReg for RegisterClassInfo allocation orders.

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This saves a bit of memory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168852 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2012-11-29 03:34:17 +00:00
parent e26e8a64ab
commit 39b5c0c049
7 changed files with 20 additions and 18 deletions
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6
include/llvm/CodeGen/RegisterClassInfo.h
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@@ -29,10 +29,10 @@ class RegisterClassInfo {
unsigned Tag;
unsigned NumRegs;
bool ProperSubClass;
OwningArrayPtr<unsigned> Order;
OwningArrayPtr<MCPhysReg> Order;
RCInfo() : Tag(0), NumRegs(0), ProperSubClass(false) {}
operator ArrayRef<unsigned>() const {
operator ArrayRef<MCPhysReg>() const {
return makeArrayRef(Order.get(), NumRegs);
}
};
@@ -84,7 +84,7 @@ public:
/// getOrder - Returns the preferred allocation order for RC. The order
/// contains no reserved registers, and registers that alias callee saved
/// registers come last.
ArrayRef<unsigned> getOrder(const TargetRegisterClass *RC) const {
ArrayRef<MCPhysReg> getOrder(const TargetRegisterClass *RC) const {
return get(RC);
}