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Clean up some uses of getSubtarget in AArch64.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227530 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eric Christopher 2015-01-30 01:10:24 +00:00
parent 5e337ee512
commit 3b386bfcd2
6 changed files with 12 additions and 23 deletions
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13
lib/Target/AArch64/AArch64A53Fix835769.cpp
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@ -16,8 +16,6 @@
//===----------------------------------------------------------------------===//
#include "AArch64.h"
#include "AArch64InstrInfo.h"
#include "AArch64Subtarget.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
@ -26,6 +24,7 @@
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Target/TargetInstrInfo.h"
using namespace llvm;
@ -79,7 +78,7 @@ static bool isSecondInstructionInSequence(MachineInstr *MI) {
namespace {
class AArch64A53Fix835769 : public MachineFunctionPass {
const AArch64InstrInfo *TII;
const TargetInstrInfo *TII;
public:
static char ID;
@ -107,17 +106,13 @@ char AArch64A53Fix835769::ID = 0;
bool
AArch64A53Fix835769::runOnMachineFunction(MachineFunction &F) {
const TargetMachine &TM = F.getTarget();
bool Changed = false;
DEBUG(dbgs() << "***** AArch64A53Fix835769 *****\n");
TII = TM.getSubtarget<AArch64Subtarget>().getInstrInfo();
bool Changed = false;
TII = F.getSubtarget().getInstrInfo();
for (auto &MBB : F) {
Changed |= runOnBasicBlock(MBB);
}
return Changed;
}

3
lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
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@ -113,7 +113,6 @@ static const char *ColorNames[2] = { "Even", "Odd" };
class Chain;
class AArch64A57FPLoadBalancing : public MachineFunctionPass {
const AArch64InstrInfo *TII;
MachineRegisterInfo *MRI;
const TargetRegisterInfo *TRI;
RegisterClassInfo RCI;
@ -311,10 +310,8 @@ bool AArch64A57FPLoadBalancing::runOnMachineFunction(MachineFunction &F) {
bool Changed = false;
DEBUG(dbgs() << "***** AArch64A57FPLoadBalancing *****\n");
const TargetMachine &TM = F.getTarget();
MRI = &F.getRegInfo();
TRI = F.getRegInfo().getTargetRegisterInfo();
TII = TM.getSubtarget<AArch64Subtarget>().getInstrInfo();
RCI.runOnMachineFunction(F);
for (auto &MBB : F) {

6
lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp
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@ -92,8 +92,7 @@ struct LDTLSCleanup : public MachineFunctionPass {
MachineInstr *replaceTLSBaseAddrCall(MachineInstr *I,
unsigned TLSBaseAddrReg) {
MachineFunction *MF = I->getParent()->getParent();
const AArch64InstrInfo *TII = static_cast<const AArch64InstrInfo *>(
MF->getSubtarget().getInstrInfo());
const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
// Insert a Copy from TLSBaseAddrReg to x0, which is where the rest of the
// code sequence assumes the address will be.
@ -111,8 +110,7 @@ struct LDTLSCleanup : public MachineFunctionPass {
// inserting a copy instruction after I. Returns the new instruction.
MachineInstr *setRegister(MachineInstr *I, unsigned *TLSBaseAddrReg) {
MachineFunction *MF = I->getParent()->getParent();
const AArch64InstrInfo *TII = static_cast<const AArch64InstrInfo *>(
MF->getSubtarget().getInstrInfo());
const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
// Create a virtual register for the TLS base address.
MachineRegisterInfo &RegInfo = MF->getRegInfo();

3
lib/Target/AArch64/AArch64CollectLOH.cpp
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@ -1040,8 +1040,7 @@ bool AArch64CollectLOH::runOnMachineFunction(MachineFunction &MF) {
MachineInstr *DummyOp = nullptr;
if (BasicBlockScopeOnly) {
const AArch64InstrInfo *TII =
static_cast<const AArch64InstrInfo *>(MF.getSubtarget().getInstrInfo());
const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
// For local analysis, create a dummy operation to record uses that are not
// local.
DummyOp = MF.CreateMachineInstr(TII->get(AArch64::COPY), DebugLoc());

8
lib/Target/AArch64/AArch64FastISel.cpp
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@ -245,9 +245,10 @@ public:
unsigned fastMaterializeFloatZero(const ConstantFP* CF) override;
explicit AArch64FastISel(FunctionLoweringInfo &FuncInfo,
const TargetLibraryInfo *LibInfo)
const TargetLibraryInfo *LibInfo)
: FastISel(FuncInfo, LibInfo, /*SkipTargetIndependentISel=*/true) {
Subtarget = &TM.getSubtarget<AArch64Subtarget>();
Subtarget =
&static_cast<const AArch64Subtarget &>(FuncInfo.MF->getSubtarget());
Context = &FuncInfo.Fn->getContext();
}
@ -3324,8 +3325,7 @@ bool AArch64FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
MFI->setFrameAddressIsTaken(true);
const AArch64RegisterInfo *RegInfo =
static_cast<const AArch64RegisterInfo *>(
FuncInfo.MF->getSubtarget().getRegisterInfo());
static_cast<const AArch64RegisterInfo *>(Subtarget->getRegisterInfo());
unsigned FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF));
unsigned SrcReg = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,

2
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
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@ -58,7 +58,7 @@ public:
FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
Attribute::OptimizeForSize) ||
FnAttrs.hasAttribute(AttributeSet::FunctionIndex, Attribute::MinSize);
Subtarget = &TM.getSubtarget<AArch64Subtarget>();
Subtarget = &static_cast<const AArch64Subtarget &>(MF.getSubtarget());
return SelectionDAGISel::runOnMachineFunction(MF);
}