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Remove these, which test for optimizations that
are not currently done (cf PowerPC/README.txt). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59456 91177308-0d34-0410-b5e6-96231b3b80d8
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; RUN: llvm-as < %s | llc -march=ppc32 | grep or | count 3
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; This should produce one 'or' or 'cror' instruction per function.
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; XFAIL: *
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; RUN: llvm-as < %s | llc -march=ppc32 | grep mfcr | count 3
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; PR2964
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define i32 @test(double %x, double %y) nounwind {
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entry:
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%tmp3 = fcmp ole double %x, %y ; <i1> [#uses=1]
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%tmp345 = zext i1 %tmp3 to i32 ; <i32> [#uses=1]
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ret i32 %tmp345
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}
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define i32 @test2(double %x, double %y) nounwind {
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entry:
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%tmp3 = fcmp one double %x, %y ; <i1> [#uses=1]
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%tmp345 = zext i1 %tmp3 to i32 ; <i32> [#uses=1]
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ret i32 %tmp345
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}
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define i32 @test3(double %x, double %y) nounwind {
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entry:
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%tmp3 = fcmp ugt double %x, %y ; <i1> [#uses=1]
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%tmp34 = zext i1 %tmp3 to i32 ; <i32> [#uses=1]
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ret i32 %tmp34
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}
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@ -1,16 +0,0 @@
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; RUN: llvm-as < %s | llc -march=ppc32 | not grep fneg
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; FSEL is not IEEE-safe, and should not be generated except with
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; -enable-finite-only-fp-math. Further, it can't be generated for
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; GT ever; it tests for GE. Leaving in the test for now as it may
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; be useful as a basis for a correct test.
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;
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; XFAIL: *
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define double @test_FNEG_sel(double %A, double %B, double %C) {
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%D = sub double -0.000000e+00, %A ; <double> [#uses=1]
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%Cond = fcmp ugt double %D, -0.000000e+00 ; <i1> [#uses=1]
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%E = select i1 %Cond, double %B, double %C ; <double> [#uses=1]
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ret double %E
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}
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