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https://github.com/c64scene-ar/llvm-6502.git
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Use COPY in targets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108063 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -427,11 +427,8 @@ unsigned AlphaInstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
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const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
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GlobalBaseReg = RegInfo.createVirtualRegister(&Alpha::GPRCRegClass);
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bool Ok = TII->copyRegToReg(FirstMBB, MBBI, GlobalBaseReg, Alpha::R29,
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&Alpha::GPRCRegClass, &Alpha::GPRCRegClass,
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DebugLoc());
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assert(Ok && "Couldn't assign to global base register!");
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Ok = Ok; // Silence warning when assertions are turned off.
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BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),
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GlobalBaseReg).addReg(Alpha::R29);
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RegInfo.addLiveIn(Alpha::R29);
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AlphaFI->setGlobalBaseReg(GlobalBaseReg);
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@@ -455,11 +452,8 @@ unsigned AlphaInstrInfo::getGlobalRetAddr(MachineFunction *MF) const {
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const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
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GlobalRetAddr = RegInfo.createVirtualRegister(&Alpha::GPRCRegClass);
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bool Ok = TII->copyRegToReg(FirstMBB, MBBI, GlobalRetAddr, Alpha::R26,
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&Alpha::GPRCRegClass, &Alpha::GPRCRegClass,
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DebugLoc());
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assert(Ok && "Couldn't assign to global return address register!");
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Ok = Ok; // Silence warning when assertions are turned off.
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BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),
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GlobalRetAddr).addReg(Alpha::R26);
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RegInfo.addLiveIn(Alpha::R26);
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AlphaFI->setGlobalRetAddr(GlobalRetAddr);
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@@ -210,12 +210,8 @@ unsigned MBlazeInstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
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const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
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GlobalBaseReg = RegInfo.createVirtualRegister(MBlaze::CPURegsRegisterClass);
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bool Ok = TII->copyRegToReg(FirstMBB, MBBI, GlobalBaseReg, MBlaze::R20,
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MBlaze::CPURegsRegisterClass,
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MBlaze::CPURegsRegisterClass,
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DebugLoc());
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assert(Ok && "Couldn't assign to global base register!");
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Ok = Ok; // Silence warning when assertions are turned off.
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BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),
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GlobalBaseReg).addReg(MBlaze::R20);
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RegInfo.addLiveIn(MBlaze::R20);
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MBlazeFI->setGlobalBaseReg(GlobalBaseReg);
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@@ -620,12 +620,8 @@ unsigned MipsInstrInfo::getGlobalBaseReg(MachineFunction *MF) const {
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const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
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GlobalBaseReg = RegInfo.createVirtualRegister(Mips::CPURegsRegisterClass);
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bool Ok = TII->copyRegToReg(FirstMBB, MBBI, GlobalBaseReg, Mips::GP,
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Mips::CPURegsRegisterClass,
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Mips::CPURegsRegisterClass,
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DebugLoc());
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assert(Ok && "Couldn't assign to global base register!");
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Ok = Ok; // Silence warning when assertions are turned off.
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BuildMI(FirstMBB, MBBI, DebugLoc(), TII->get(TargetOpcode::COPY),
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GlobalBaseReg).addReg(Mips::GP);
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RegInfo.addLiveIn(Mips::GP);
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MipsFI->setGlobalBaseReg(GlobalBaseReg);
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