Pseudo-ize the Thumb1 tBfar pattern. rdar://8777974

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121990 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-12-16 19:11:16 +00:00
parent dd18e28c62
commit 3efad8fad4
2 changed files with 12 additions and 3 deletions

View File

@ -746,6 +746,14 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
}
return;
}
case ARM::tBfar: {
MCInst TmpInst;
TmpInst.setOpcode(ARM::tBL);
TmpInst.addOperand(MCOperand::CreateExpr(MCSymbolRefExpr::Create(
MI->getOperand(0).getMBB()->getSymbol(), OutContext)));
OutStreamer.EmitInstruction(TmpInst);
return;
}
case ARM::LEApcrel:
case ARM::tLEApcrel:
case ARM::t2LEApcrel: {

View File

@ -535,10 +535,11 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
}
// Far jump
// FIXME: Encoding. This should probably be a pseudo for tBL
// Just a pseudo for a tBL instruction. Needed to let regalloc know about
// the clobber of LR.
let Defs = [LR] in
def tBfar : TIx2<0b11110, 0b11, 1, (outs), (ins brtarget:$target), IIC_Br,
"bl\t$target",[]>;
def tBfar : tPseudoInst<(outs), (ins t_bltarget:$target),
Size4Bytes, IIC_Br, []>;
def tBR_JTr : tPseudoInst<(outs),
(ins tGPR:$target, i32imm:$jt, i32imm:$id),