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Handle cracked instructions in dispatch group formation.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26721 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-03-13 05:20:04 +00:00
parent fd97734f36
commit 3faad495bc
2 changed files with 28 additions and 15 deletions
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31
lib/Target/PowerPC/PPCHazardRecognizers.cpp
View File

@ -42,10 +42,8 @@ using namespace llvm;
//
// FIXME: This is missing some significant cases:
// 1. Modeling of microcoded instructions.
// 2. Handling of cracked instructions.
// 3. Handling of serialized operations.
// 4. Handling of the esoteric cases in "Resource-based Instruction Grouping",
// e.g. integer divides that only execute in the second slot.
// 2. Handling of serialized operations.
// 3. Handling of the esoteric cases in "Resource-based Instruction Grouping".
//
PPCHazardRecognizer970::PPCHazardRecognizer970(const TargetInstrInfo &tii)
@ -66,9 +64,10 @@ void PPCHazardRecognizer970::EndDispatchGroup() {
PPCII::PPC970_Unit
PPCHazardRecognizer970::GetInstrType(unsigned Opcode,
bool &isFirst, bool &isSingle,
bool &isCracked,
bool &isLoad, bool &isStore) {
if (Opcode < ISD::BUILTIN_OP_END) {
isFirst = isSingle = isLoad = isStore = false;
isFirst = isSingle = isCracked = isLoad = isStore = false;
return PPCII::PPC970_Pseudo;
}
Opcode -= ISD::BUILTIN_OP_END;
@ -82,6 +81,7 @@ PPCHazardRecognizer970::GetInstrType(unsigned Opcode,
isFirst = TSFlags & PPCII::PPC970_First;
isSingle = TSFlags & PPCII::PPC970_Single;
isCracked = TSFlags & PPCII::PPC970_Cracked;
return (PPCII::PPC970_Unit)(TSFlags & PPCII::PPC970_Mask);
}
@ -122,9 +122,10 @@ isLoadOfStoredAddress(unsigned LoadSize, SDOperand Ptr1, SDOperand Ptr2) const {
/// pipeline flush.
HazardRecognizer::HazardType PPCHazardRecognizer970::
getHazardType(SDNode *Node) {
bool isFirst, isSingle, isLoad, isStore;
bool isFirst, isSingle, isCracked, isLoad, isStore;
PPCII::PPC970_Unit InstrType =
GetInstrType(Node->getOpcode(), isFirst, isSingle, isLoad, isStore);
GetInstrType(Node->getOpcode(), isFirst, isSingle, isCracked,
isLoad, isStore);
if (InstrType == PPCII::PPC970_Pseudo) return NoHazard;
unsigned Opcode = Node->getOpcode()-ISD::BUILTIN_OP_END;
@ -133,6 +134,12 @@ getHazardType(SDNode *Node) {
if (NumIssued != 0 && (isFirst || isSingle))
return Hazard;
// If this instruction is cracked into two ops by the decoder, we know that
// it is not a branch and that it cannot issue if 3 other instructions are
// already in the dispatch group.
if (isCracked && NumIssued > 2)
return Hazard;
switch (InstrType) {
default: assert(0 && "Unknown instruction type!");
case PPCII::PPC970_FXU:
@ -203,9 +210,10 @@ getHazardType(SDNode *Node) {
}
void PPCHazardRecognizer970::EmitInstruction(SDNode *Node) {
bool isFirst, isSingle, isLoad, isStore;
bool isFirst, isSingle, isCracked, isLoad, isStore;
PPCII::PPC970_Unit InstrType =
GetInstrType(Node->getOpcode(), isFirst, isSingle, isLoad, isStore);
GetInstrType(Node->getOpcode(), isFirst, isSingle, isCracked,
isLoad, isStore);
if (InstrType == PPCII::PPC970_Pseudo) return;
unsigned Opcode = Node->getOpcode()-ISD::BUILTIN_OP_END;
@ -260,6 +268,11 @@ void PPCHazardRecognizer970::EmitInstruction(SDNode *Node) {
NumIssued = 4; // Terminate a d-group.
++NumIssued;
// If this instruction is cracked into two ops by the decoder, remember that
// we issued two pieces.
if (isCracked)
++NumIssued;
if (NumIssued == 5)
EndDispatchGroup();
}

2
lib/Target/PowerPC/PPCHazardRecognizers.h
View File

@ -60,7 +60,7 @@ private:
/// GetInstrType - Classify the specified powerpc opcode according to its
/// pipeline.
PPCII::PPC970_Unit GetInstrType(unsigned Opcode,
bool &isFirst, bool &isSingle,
bool &isFirst, bool &isSingle,bool &isCracked,
bool &isLoad, bool &isStore);
bool isLoadOfStoredAddress(unsigned LoadSize,