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synced 2024-12-13 20:32:21 +00:00
Simplify code; NFC.
Also, moved test cases from CodeGen/X86/fold-buildvector-bug.ll into CodeGen/X86/buildvec-insertvec.ll and regenerated CHECK lines using update_llc_test_checks.py. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@239142 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -619,7 +619,7 @@ static SDValue GetNegatedExpression(SDValue Op, SelectionDAG &DAG,
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// fold (fneg (fsub 0, B)) -> B
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if (ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(Op.getOperand(0)))
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if (N0CFP->getValueAPF().isZero())
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if (N0CFP->isZero())
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return Op.getOperand(1);
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// fold (fneg (fsub A, B)) -> (fsub B, A)
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@ -7864,7 +7864,7 @@ SDValue DAGCombiner::visitFADD(SDNode *N) {
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bool AllowNewConst = (Level < AfterLegalizeDAG);
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// fold (fadd A, 0) -> A
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if (N1CFP && N1CFP->getValueAPF().isZero())
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if (N1CFP && N1CFP->isZero())
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return N0;
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// fold (fadd (fadd x, c1), c2) -> (fadd x, (fadd c1, c2))
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@ -7995,11 +7995,11 @@ SDValue DAGCombiner::visitFSUB(SDNode *N) {
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// If 'unsafe math' is enabled, fold lots of things.
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if (Options.UnsafeFPMath) {
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// (fsub A, 0) -> A
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if (N1CFP && N1CFP->getValueAPF().isZero())
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if (N1CFP && N1CFP->isZero())
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return N0;
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// (fsub 0, B) -> -B
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if (N0CFP && N0CFP->getValueAPF().isZero()) {
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if (N0CFP && N0CFP->isZero()) {
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if (isNegatibleForFree(N1, LegalOperations, TLI, &Options))
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return GetNegatedExpression(N1, DAG, LegalOperations);
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if (!LegalOperations || TLI.isOperationLegal(ISD::FNEG, VT))
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@ -8065,7 +8065,7 @@ SDValue DAGCombiner::visitFMUL(SDNode *N) {
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if (Options.UnsafeFPMath) {
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// fold (fmul A, 0) -> 0
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if (N1CFP && N1CFP->getValueAPF().isZero())
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if (N1CFP && N1CFP->isZero())
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return N1;
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// fold (fmul (fmul x, c1), c2) -> (fmul x, (fmul c1, c2))
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@ -12995,7 +12995,7 @@ SDValue DAGCombiner::SimplifyVBinOp(SDNode *N) {
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if (N->getOpcode() == ISD::SDIV || N->getOpcode() == ISD::UDIV ||
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N->getOpcode() == ISD::FDIV) {
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if (isNullConstant(RHSOp) || (RHSOp.getOpcode() == ISD::ConstantFP &&
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cast<ConstantFPSDNode>(RHSOp.getNode())->getValueAPF().isZero()))
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cast<ConstantFPSDNode>(RHSOp.getNode())->isZero()))
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break;
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}
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@ -13259,7 +13259,7 @@ SDValue DAGCombiner::SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1,
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// Check to see if we can simplify the select into an fabs node
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if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1)) {
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// Allow either -0.0 or 0.0
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if (CFP->getValueAPF().isZero()) {
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if (CFP->isZero()) {
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// select (setg[te] X, +/-0.0), X, fneg(X) -> fabs
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if ((CC == ISD::SETGE || CC == ISD::SETGT) &&
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N0 == N2 && N3.getOpcode() == ISD::FNEG &&
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@ -1,15 +1,56 @@
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; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s
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define void @foo(<3 x float> %in, <4 x i8>* nocapture %out) nounwind {
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; CHECK-LABEL: foo:
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; CHECK: # BB#0:
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; CHECK-NEXT: cvttps2dq %xmm0, %xmm0
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; CHECK-NEXT: movl $255, %eax
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; CHECK-NEXT: pinsrd $3, %eax, %xmm0
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; CHECK-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
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; CHECK-NEXT: movd %xmm0, (%rdi)
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; CHECK-NEXT: retq
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%t0 = fptoui <3 x float> %in to <3 x i8>
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%t1 = shufflevector <3 x i8> %t0, <3 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
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%t2 = insertelement <4 x i8> %t1, i8 -1, i32 3
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store <4 x i8> %t2, <4 x i8>* %out, align 4
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ret void
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; CHECK: foo
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; CHECK: cvttps2dq
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; CHECK-NOT: pextrd
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; CHECK: pinsrd
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; CHECK-NEXT: pshufb
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; CHECK: ret
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}
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; Verify that the DAGCombiner doesn't wrongly fold a build_vector into a
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; blend with a zero vector if the build_vector contains negative zero.
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;
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; TODO: the codegen for function 'test_negative_zero_1' is sub-optimal.
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; Ideally, we should generate a single shuffle blend operation.
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define <4 x float> @test_negative_zero_1(<4 x float> %A) {
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; CHECK-LABEL: test_negative_zero_1:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movapd %xmm0, %xmm1
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; CHECK-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1,0]
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; CHECK-NEXT: xorps %xmm2, %xmm2
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; CHECK-NEXT: blendps {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
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; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0]
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; CHECK-NEXT: retq
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entry:
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%0 = extractelement <4 x float> %A, i32 0
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%1 = insertelement <4 x float> undef, float %0, i32 0
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%2 = insertelement <4 x float> %1, float -0.0, i32 1
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%3 = extractelement <4 x float> %A, i32 2
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%4 = insertelement <4 x float> %2, float %3, i32 2
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%5 = insertelement <4 x float> %4, float 0.0, i32 3
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ret <4 x float> %5
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}
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define <2 x double> @test_negative_zero_2(<2 x double> %A) {
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; CHECK-LABEL: test_negative_zero_2:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movhpd {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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entry:
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%0 = extractelement <2 x double> %A, i32 0
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%1 = insertelement <2 x double> undef, double %0, i32 0
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%2 = insertelement <2 x double> %1, double -0.0, i32 1
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ret <2 x double> %2
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}
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@ -1,40 +0,0 @@
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; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 < %s | FileCheck %s
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; Verify that the DAGCombiner doesn't wrongly fold a build_vector into a
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; blend with a zero vector if the build_vector contains negative zero.
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;
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; TODO: the codegen for function 'test_negative_zero_1' is sub-optimal.
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; Ideally, we should generate a single shuffle blend operation.
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define <4 x float> @test_negative_zero_1(<4 x float> %A) {
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; CHECK-LABEL: test_negative_zero_1:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movapd %xmm0, %xmm1
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; CHECK-NEXT: shufpd {{.*#+}} xmm1 = xmm1[1,0]
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; CHECK-NEXT: xorps %xmm2, %xmm2
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; CHECK-NEXT: blendps {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
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; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
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; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0]
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; CHECK-NEXT: retq
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entry:
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%0 = extractelement <4 x float> %A, i32 0
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%1 = insertelement <4 x float> undef, float %0, i32 0
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%2 = insertelement <4 x float> %1, float -0.0, i32 1
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%3 = extractelement <4 x float> %A, i32 2
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%4 = insertelement <4 x float> %2, float %3, i32 2
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%5 = insertelement <4 x float> %4, float 0.0, i32 3
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ret <4 x float> %5
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}
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define <2 x double> @test_negative_zero_2(<2 x double> %A) {
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; CHECK-LABEL: test_negative_zero_2:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movhpd {{.*}}(%rip), %xmm0
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; CHECK-NEXT: retq
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entry:
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%0 = extractelement <2 x double> %A, i32 0
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%1 = insertelement <2 x double> undef, double %0, i32 0
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%2 = insertelement <2 x double> %1, double -0.0, i32 1
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ret <2 x double> %2
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}
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