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Translate llvm target registers to dwarf register numbers properly.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27180 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Laskey
2006-03-27 20:18:45 +00:00
parent 30c495e0f7
commit 414e682bac
5 changed files with 5 additions and 5 deletions
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2
lib/Target/IA64/IA64RegisterInfo.cpp
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@@ -337,7 +337,7 @@ void IA64RegisterInfo::getLocation(MachineFunction &MF, unsigned Index,
// FIXME - Needs to handle register variables.
// FIXME - Faking that llvm number is same as gcc numbering.
ML.set((FP ? IA64::r5 : IA64::r12) - IA64::r0,
ML.set(getDwarfRegNum(FP ? IA64::r5 : IA64::r12),
MFI->getObjectOffset(Index) + MFI->getStackSize());
}