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R600/SI: Expand urem of v2i32/v4i32 for SI
Also add lit test for both cases on SI, and v2i32 for evergreen. Note: I followed the guidance of the v4i32 EG check... UREM produces really complex code, so let's just check that the instruction was lowered successfully. Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184844 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -90,6 +90,9 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) :
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setOperationAction(ISD::UDIV, MVT::v2i32, Expand);
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setOperationAction(ISD::UDIV, MVT::v4i32, Expand);
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setOperationAction(ISD::UREM, MVT::v2i32, Expand);
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setOperationAction(ISD::UREM, MVT::v4i32, Expand);
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setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
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setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
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@ -1,11 +1,30 @@
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;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
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;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck --check-prefix=SI-CHECK %s
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;The code generated by urem is long and complex and may frequently change.
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;The goal of this test is to make sure the ISel doesn't fail when it gets
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;a v4i32 urem
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;CHECK: CF_END
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;a v2i32/v4i32 urem
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define void @test(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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;EG-CHECK: @test2
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;EG-CHECK: CF_END
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;SI-CHECK: @test2
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;SI-CHECK: S_ENDPGM
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define void @test2(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
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%b_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1
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%a = load <2 x i32> addrspace(1) * %in
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%b = load <2 x i32> addrspace(1) * %b_ptr
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%result = urem <2 x i32> %a, %b
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store <2 x i32> %result, <2 x i32> addrspace(1)* %out
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ret void
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}
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;EG-CHECK: @test4
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;EG-CHECK: CF_END
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;SI-CHECK: @test4
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;SI-CHECK: S_ENDPGM
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define void @test4(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
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%b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
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%a = load <4 x i32> addrspace(1) * %in
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%b = load <4 x i32> addrspace(1) * %b_ptr
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