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misched: disable SSA check pending PR13112.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158461 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2012-06-14 17:48:49 +00:00
parent cba91230c0
commit 42120a2c55
1 changed files with 4 additions and 2 deletions
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6
lib/CodeGen/ScheduleDAGInstrs.cpp
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@ -413,8 +413,10 @@ void ScheduleDAGInstrs::addVRegDefDeps(SUnit *SU, unsigned OperIdx) {
// SSA defs do not have output/anti dependencies.
// The current operand is a def, so we have at least one.
if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end())
return;
//
// FIXME: This optimization is disabled pending PR13112.
//if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end())
// return;
// Add output dependence to the next nearest def of this vreg.
//