mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-21 18:29:46 +00:00
misched: disable SSA check pending PR13112.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158461 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
cba91230c0
commit
42120a2c55
@ -413,8 +413,10 @@ void ScheduleDAGInstrs::addVRegDefDeps(SUnit *SU, unsigned OperIdx) {
|
||||
|
||||
// SSA defs do not have output/anti dependencies.
|
||||
// The current operand is a def, so we have at least one.
|
||||
if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end())
|
||||
return;
|
||||
//
|
||||
// FIXME: This optimization is disabled pending PR13112.
|
||||
//if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end())
|
||||
// return;
|
||||
|
||||
// Add output dependence to the next nearest def of this vreg.
|
||||
//
|
||||
|
Loading…
Reference in New Issue
Block a user