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Remove the TII::scheduleTwoAddrSource() hook.

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It never does anything when running 'make check', and it get's in the
way of updating live intervals in 2-addr.

The hook was originally added to help form IT blocks in Thumb2 code
before register allocation, but the pass ordering has changed since
then, and we run if-conversion after register allocation now.

When the MI scheduler is enabled, there will be no less than two
schedulers between 2-addr and Thumb2ITBlockPass, so this hook is
unlikely to help anything.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161794 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-08-13 21:52:57 +00:00
parent 6de47d611e
commit 43600e95ec
4 changed files with 0 additions and 66 deletions
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8
include/llvm/Target/TargetInstrInfo.h
View File

@ -188,14 +188,6 @@ public:
const MachineInstr *Orig,
const TargetRegisterInfo &TRI) const = 0;
/// scheduleTwoAddrSource - Schedule the copy / re-mat of the source of the
/// two-addrss instruction inserted by two-address pass.
virtual void scheduleTwoAddrSource(MachineInstr *SrcMI,
MachineInstr *UseMI,
const TargetRegisterInfo &TRI) const {
// Do nothing.
}
/// duplicate - Create a duplicate of the Orig instruction in MF. This is like
/// MachineFunction::CloneMachineInstr(), but the target may update operands
/// that are required to be unique.

11
lib/CodeGen/TwoAddressInstructionPass.cpp
View File

@ -1352,17 +1352,6 @@ TwoAddressInstructionPass::processTiedPairs(MachineInstr *MI,
}
}
}
// We didn't change anything if there was a single tied pair, and that
// pair didn't require copies.
if (AllUsesCopied || TiedPairs.size() > 1) {
// Schedule the source copy / remat inserted to form two-address
// instruction. FIXME: Does it matter the distance map may not be
// accurate after it's scheduled?
MachineBasicBlock::iterator PrevMI = MI;
--PrevMI;
TII->scheduleTwoAddrSource(PrevMI, MI, *TRI);
}
}
/// runOnMachineFunction - Reduce two-address instructions to two operands.

42
lib/Target/ARM/Thumb2InstrInfo.cpp
View File

@ -563,48 +563,6 @@ bool llvm::rewriteT2FrameIndex(MachineInstr &MI, unsigned FrameRegIdx,
return Offset == 0;
}
/// scheduleTwoAddrSource - Schedule the copy / re-mat of the source of the
/// two-addrss instruction inserted by two-address pass.
void
Thumb2InstrInfo::scheduleTwoAddrSource(MachineInstr *SrcMI,
MachineInstr *UseMI,
const TargetRegisterInfo &TRI) const {
if (SrcMI->getOpcode() != ARM::tMOVr || SrcMI->getOperand(1).isKill())
return;
unsigned PredReg = 0;
ARMCC::CondCodes CC = getInstrPredicate(UseMI, PredReg);
if (CC == ARMCC::AL || PredReg != ARM::CPSR)
return;
// Schedule the copy so it doesn't come between previous instructions
// and UseMI which can form an IT block.
unsigned SrcReg = SrcMI->getOperand(1).getReg();
ARMCC::CondCodes OCC = ARMCC::getOppositeCondition(CC);
MachineBasicBlock *MBB = UseMI->getParent();
MachineBasicBlock::iterator MBBI = SrcMI;
unsigned NumInsts = 0;
while (--MBBI != MBB->begin()) {
if (MBBI->isDebugValue())
continue;
MachineInstr *NMI = &*MBBI;
ARMCC::CondCodes NCC = getInstrPredicate(NMI, PredReg);
if (!(NCC == CC || NCC == OCC) ||
NMI->modifiesRegister(SrcReg, &TRI) ||
NMI->modifiesRegister(ARM::CPSR, &TRI))
break;
if (++NumInsts == 4)
// Too many in a row!
return;
}
if (NumInsts) {
MBB->remove(SrcMI);
MBB->insert(++MBBI, SrcMI);
}
}
ARMCC::CondCodes
llvm::getITInstrPredicate(const MachineInstr *MI, unsigned &PredReg) {
unsigned Opc = MI->getOpcode();

5
lib/Target/ARM/Thumb2InstrInfo.h
View File

@ -57,11 +57,6 @@ public:
const TargetRegisterClass *RC,
const TargetRegisterInfo *TRI) const;
/// scheduleTwoAddrSource - Schedule the copy / re-mat of the source of the
/// two-addrss instruction inserted by two-address pass.
void scheduleTwoAddrSource(MachineInstr *SrcMI, MachineInstr *UseMI,
const TargetRegisterInfo &TRI) const;
/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
/// such, whenever a client has an instance of instruction info, it should
/// always be able to get register info as well (through this method).