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[X86][SSE] Bitcast assertion in XFormVExtractWithShuffleIntoLoad
Minor patch to fix an issue in XFormVExtractWithShuffleIntoLoad where a load is unary shuffled, then bitcast (to a type with the same number of elements) before extracting an element. An undef was created for the second shuffle operand using the original (post-bitcasted) vector type instead of the pre-bitcasted type like the rest of the shuffle node - this was then causing an assertion on the different types later on inside SelectionDAG::getVectorShuffle. Differential Revision: http://reviews.llvm.org/D5917 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220592 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -21776,7 +21776,7 @@ static SDValue PerformTruncateCombine(SDNode *N, SelectionDAG &DAG,
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/// XFormVExtractWithShuffleIntoLoad - Check if a vector extract from a target
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/// specific shuffle of a load can be folded into a single element load.
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/// Similar handling for VECTOR_SHUFFLE is performed by DAGCombiner, but
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/// shuffles have been customed lowered so we need to handle those here.
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/// shuffles have been custom lowered so we need to handle those here.
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static SDValue XFormVExtractWithShuffleIntoLoad(SDNode *N, SelectionDAG &DAG,
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TargetLowering::DAGCombinerInfo &DCI) {
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if (DCI.isBeforeLegalizeOps())
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@ -21788,18 +21788,20 @@ static SDValue XFormVExtractWithShuffleIntoLoad(SDNode *N, SelectionDAG &DAG,
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if (!isa<ConstantSDNode>(EltNo))
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return SDValue();
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EVT VT = InVec.getValueType();
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EVT OriginalVT = InVec.getValueType();
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if (InVec.getOpcode() == ISD::BITCAST) {
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// Don't duplicate a load with other uses.
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if (!InVec.hasOneUse())
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return SDValue();
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EVT BCVT = InVec.getOperand(0).getValueType();
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if (BCVT.getVectorNumElements() != VT.getVectorNumElements())
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if (BCVT.getVectorNumElements() != OriginalVT.getVectorNumElements())
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return SDValue();
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InVec = InVec.getOperand(0);
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}
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EVT CurrentVT = InVec.getValueType();
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if (!isTargetShuffle(InVec.getOpcode()))
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return SDValue();
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@ -21809,12 +21811,12 @@ static SDValue XFormVExtractWithShuffleIntoLoad(SDNode *N, SelectionDAG &DAG,
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SmallVector<int, 16> ShuffleMask;
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bool UnaryShuffle;
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if (!getTargetShuffleMask(InVec.getNode(), VT.getSimpleVT(), ShuffleMask,
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UnaryShuffle))
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if (!getTargetShuffleMask(InVec.getNode(), CurrentVT.getSimpleVT(),
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ShuffleMask, UnaryShuffle))
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return SDValue();
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// Select the input vector, guarding against out of range extract vector.
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unsigned NumElems = VT.getVectorNumElements();
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unsigned NumElems = CurrentVT.getVectorNumElements();
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int Elt = cast<ConstantSDNode>(EltNo)->getZExtValue();
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int Idx = (Elt > (int)NumElems) ? -1 : ShuffleMask[Elt];
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SDValue LdNode = (Idx < (int)NumElems) ? InVec.getOperand(0)
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@ -21856,11 +21858,12 @@ static SDValue XFormVExtractWithShuffleIntoLoad(SDNode *N, SelectionDAG &DAG,
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SDLoc dl(N);
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// Create shuffle node taking into account the case that its a unary shuffle
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SDValue Shuffle = (UnaryShuffle) ? DAG.getUNDEF(VT) : InVec.getOperand(1);
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Shuffle = DAG.getVectorShuffle(InVec.getValueType(), dl,
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SDValue Shuffle = (UnaryShuffle) ? DAG.getUNDEF(CurrentVT)
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: InVec.getOperand(1);
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Shuffle = DAG.getVectorShuffle(CurrentVT, dl,
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InVec.getOperand(0), Shuffle,
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&ShuffleMask[0]);
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Shuffle = DAG.getNode(ISD::BITCAST, dl, VT, Shuffle);
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Shuffle = DAG.getNode(ISD::BITCAST, dl, OriginalVT, Shuffle);
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return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, N->getValueType(0), Shuffle,
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EltNo);
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}
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@ -46,3 +46,19 @@ bb:
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store double %.sroa.3.24.vec.extract, double* undef, align 8
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unreachable
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}
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; Case where a load is unary shuffled, then bitcast (to a type with the same
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; number of elements) before extractelement.
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; This is testing for an assertion - the extraction was assuming that the undef
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; second shuffle operand was a post-bitcast type instead of a pre-bitcast type.
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define i64 @t4(<2 x double>* %a) {
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; CHECK-LABEL: t4:
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; CHECK: mov
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; CHECK: ret
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%b = load <2 x double>* %a, align 16
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%c = shufflevector <2 x double> %b, <2 x double> %b, <2 x i32> <i32 1, i32 0>
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%d = bitcast <2 x double> %c to <2 x i64>
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%e = extractelement <2 x i64> %d, i32 1
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ret i64 %e
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}
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