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Change SPU C calling convention to match that described in

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"SPU Application Binary Interface Specification, v1.9" by
IBM. 
Specifically: use r3-r74 to pass parameters and the return value.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111358 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Kalle Raiskila 2010-08-18 09:50:30 +00:00
parent 285d06ca93
commit 44ff5f5435
2 changed files with 45 additions and 11 deletions
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23
lib/Target/CellSPU/SPUCallingConv.td
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@ -19,16 +19,18 @@ class CCIfSubtarget<string F, CCAction A>
// Return Value Calling Convention
//===----------------------------------------------------------------------===//
// Return-value convention for Cell SPU: Everything can be passed back via $3:
// Return-value convention for Cell SPU: return value to be passed in reg 3-74
def RetCC_SPU : CallingConv<[
CCIfType<[i8], CCAssignToReg<[R3]>>,
CCIfType<[i16], CCAssignToReg<[R3]>>,
CCIfType<[i32], CCAssignToReg<[R3]>>,
CCIfType<[i64], CCAssignToReg<[R3]>>,
CCIfType<[i128], CCAssignToReg<[R3]>>,
CCIfType<[f32, f64], CCAssignToReg<[R3]>>,
CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], CCAssignToReg<[R3]>>,
CCIfType<[v2i32, v2f32], CCAssignToReg<[R3]>>
CCIfType<[i8,i16,i32,i64,i128,f32,f64,v16i8,v8i16,v4i32,v2i64,v4f32,v2f64,
v2i32, v2f32],
CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10, R11,
R12, R13, R14, R15, R16, R17, R18, R19, R20,
R21, R22, R23, R24, R25, R26, R27, R28, R29,
R30, R31, R32, R33, R34, R35, R36, R37, R38,
R39, R40, R41, R42, R43, R44, R45, R46, R47,
R48, R49, R50, R51, R52, R53, R54, R55, R56,
R57, R58, R59, R60, R61, R62, R63, R64, R65,
R66, R67, R68, R69, R70, R71, R72, R73, R74]>>
]>;
@ -45,8 +47,7 @@ def CCC_SPU : CallingConv<[
R39, R40, R41, R42, R43, R44, R45, R46, R47,
R48, R49, R50, R51, R52, R53, R54, R55, R56,
R57, R58, R59, R60, R61, R62, R63, R64, R65,
R66, R67, R68, R69, R70, R71, R72, R73, R74,
R75, R76, R77, R78, R79]>>,
R66, R67, R68, R69, R70, R71, R72, R73, R74]>>,
// Integer/FP values get stored in stack slots that are 8 bytes in size and
// 8-byte aligned if there are no more registers to hold them.
CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,

33
test/CodeGen/CellSPU/arg_ret.ll Normal file
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@ -0,0 +1,33 @@
; Test parameter passing and return values
;RUN: llc --march=cellspu %s -o - | FileCheck %s
; this fits into registers r3-r74
%paramstruct = type { i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,
i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,
i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,
i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,
i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,
i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32,i32}
define ccc i32 @test_regs( %paramstruct %prm )
{
;CHECK: lr $3, $74
;CHECK: bi $lr
%1 = extractvalue %paramstruct %prm, 71
ret i32 %1
}
define ccc i32 @test_regs_and_stack( %paramstruct %prm, i32 %stackprm )
{
;CHECK-NOT: a $3, $74, $75
%1 = extractvalue %paramstruct %prm, 71
%2 = add i32 %1, %stackprm
ret i32 %2
}
define ccc %paramstruct @test_return( i32 %param, %paramstruct %prm )
{
;CHEKC: lqd $75, 80($sp)
;CHECK: lr $3, $4
ret %paramstruct %prm
}