Remove simple scheduler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42499 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-10-01 20:44:07 +00:00
parent bc2265abe1
commit 450ff01faf
3 changed files with 0 additions and 1186 deletions

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@ -35,9 +35,6 @@ namespace {
(void) llvm::createSimpleRegisterCoalescer();
(void) llvm::createBFS_DAGScheduler(NULL, NULL, NULL);
(void) llvm::createSimpleDAGScheduler(NULL, NULL, NULL);
(void) llvm::createNoItinsDAGScheduler(NULL, NULL, NULL);
(void) llvm::createBURRListDAGScheduler(NULL, NULL, NULL);
(void) llvm::createTDRRListDAGScheduler(NULL, NULL, NULL);
(void) llvm::createTDListDAGScheduler(NULL, NULL, NULL);

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@ -354,24 +354,6 @@ namespace llvm {
DenseMap<SDOperand, unsigned> &VRBaseMap);
};
/// createBFS_DAGScheduler - This creates a simple breadth first instruction
/// scheduler.
ScheduleDAG *createBFS_DAGScheduler(SelectionDAGISel *IS,
SelectionDAG *DAG,
MachineBasicBlock *BB);
/// createSimpleDAGScheduler - This creates a simple two pass instruction
/// scheduler using instruction itinerary.
ScheduleDAG* createSimpleDAGScheduler(SelectionDAGISel *IS,
SelectionDAG *DAG,
MachineBasicBlock *BB);
/// createNoItinsDAGScheduler - This creates a simple two pass instruction
/// scheduler without using instruction itinerary.
ScheduleDAG* createNoItinsDAGScheduler(SelectionDAGISel *IS,
SelectionDAG *DAG,
MachineBasicBlock *BB);
/// createBURRListDAGScheduler - This creates a bottom up register usage
/// reduction list scheduler.
ScheduleDAG* createBURRListDAGScheduler(SelectionDAGISel *IS,

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