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Remove simple scheduler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42499 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -35,9 +35,6 @@ namespace {
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(void) llvm::createSimpleRegisterCoalescer();
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(void) llvm::createBFS_DAGScheduler(NULL, NULL, NULL);
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(void) llvm::createSimpleDAGScheduler(NULL, NULL, NULL);
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(void) llvm::createNoItinsDAGScheduler(NULL, NULL, NULL);
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(void) llvm::createBURRListDAGScheduler(NULL, NULL, NULL);
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(void) llvm::createTDRRListDAGScheduler(NULL, NULL, NULL);
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(void) llvm::createTDListDAGScheduler(NULL, NULL, NULL);
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@ -354,24 +354,6 @@ namespace llvm {
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DenseMap<SDOperand, unsigned> &VRBaseMap);
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};
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/// createBFS_DAGScheduler - This creates a simple breadth first instruction
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/// scheduler.
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ScheduleDAG *createBFS_DAGScheduler(SelectionDAGISel *IS,
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SelectionDAG *DAG,
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MachineBasicBlock *BB);
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/// createSimpleDAGScheduler - This creates a simple two pass instruction
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/// scheduler using instruction itinerary.
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ScheduleDAG* createSimpleDAGScheduler(SelectionDAGISel *IS,
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SelectionDAG *DAG,
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MachineBasicBlock *BB);
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/// createNoItinsDAGScheduler - This creates a simple two pass instruction
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/// scheduler without using instruction itinerary.
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ScheduleDAG* createNoItinsDAGScheduler(SelectionDAGISel *IS,
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SelectionDAG *DAG,
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MachineBasicBlock *BB);
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/// createBURRListDAGScheduler - This creates a bottom up register usage
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/// reduction list scheduler.
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ScheduleDAG* createBURRListDAGScheduler(SelectionDAGISel *IS,
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