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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
Revert 85799 for now. It might be breaking llvm-gcc driver.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85827 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
parent
907eebd5a6
commit
454ac8961b
@ -56,12 +56,12 @@ namespace {
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// State that is updated as we process loops
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bool Changed; // True if a loop is changed.
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bool FirstInLoop; // True if it's the first LICM in the loop.
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MachineLoop *CurLoop; // The current loop we are working on.
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MachineBasicBlock *CurPreheader; // The preheader for CurLoop.
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// For each opcode, keep a list of potentail CSE instructions.
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DenseMap<unsigned, std::vector<const MachineInstr*> > CSEMap;
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// For each BB and opcode pair, keep a list of hoisted instructions.
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DenseMap<std::pair<unsigned, unsigned>,
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std::vector<const MachineInstr*> > CSEMap;
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public:
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static char ID; // Pass identification, replacement for typeid
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MachineLICM() : MachineFunctionPass(&ID) {}
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@ -115,11 +115,6 @@ namespace {
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/// that is safe to hoist, this instruction is called to do the dirty work.
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///
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void Hoist(MachineInstr *MI);
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/// InitCSEMap - Initialize the CSE map with instructions that are in the
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/// current loop preheader that may become duplicates of instructions that
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/// are hoisted out of the loop.
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void InitCSEMap(MachineBasicBlock *BB);
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};
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} // end anonymous namespace
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@ -145,7 +140,7 @@ static bool LoopIsOuterMostWithPreheader(MachineLoop *CurLoop) {
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bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
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DEBUG(errs() << "******** Machine LICM ********\n");
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Changed = FirstInLoop = false;
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Changed = false;
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TM = &MF.getTarget();
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TII = TM->getInstrInfo();
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TRI = TM->getRegisterInfo();
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@ -157,7 +152,8 @@ bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
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DT = &getAnalysis<MachineDominatorTree>();
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AA = &getAnalysis<AliasAnalysis>();
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for (MachineLoopInfo::iterator I = LI->begin(), E = LI->end(); I != E; ++I) {
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for (MachineLoopInfo::iterator
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I = LI->begin(), E = LI->end(); I != E; ++I) {
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CurLoop = *I;
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// Only visit outer-most preheader-sporting loops.
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@ -174,11 +170,7 @@ bool MachineLICM::runOnMachineFunction(MachineFunction &MF) {
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if (!CurPreheader)
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continue;
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// CSEMap is initialized for loop header when the first instruction is
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// being hoisted.
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FirstInLoop = true;
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HoistRegion(DT->getNode(CurLoop->getHeader()));
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CSEMap.clear();
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}
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return Changed;
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@ -199,7 +191,10 @@ void MachineLICM::HoistRegion(MachineDomTreeNode *N) {
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for (MachineBasicBlock::iterator
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MII = BB->begin(), E = BB->end(); MII != E; ) {
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MachineBasicBlock::iterator NextMII = MII; ++NextMII;
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Hoist(&*MII);
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MachineInstr &MI = *MII;
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Hoist(&MI);
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MII = NextMII;
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}
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@ -435,27 +430,6 @@ MachineInstr *MachineLICM::ExtractHoistableLoad(MachineInstr *MI) {
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return NewMIs[0];
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}
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void MachineLICM::InitCSEMap(MachineBasicBlock *BB) {
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for (MachineBasicBlock::iterator I = BB->begin(),E = BB->end(); I != E; ++I) {
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const MachineInstr *MI = &*I;
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// FIXME: For now, only hoist re-materilizable instructions. LICM will
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// increase register pressure. We want to make sure it doesn't increase
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// spilling.
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if (TII->isTriviallyReMaterializable(MI, AA)) {
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unsigned Opcode = MI->getOpcode();
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DenseMap<unsigned, std::vector<const MachineInstr*> >::iterator
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CI = CSEMap.find(Opcode);
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if (CI != CSEMap.end())
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CI->second.push_back(MI);
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else {
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std::vector<const MachineInstr*> CSEMIs;
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CSEMIs.push_back(MI);
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CSEMap.insert(std::make_pair(Opcode, CSEMIs));
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}
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}
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}
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}
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/// Hoist - When an instruction is found to use only loop invariant operands
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/// that are safe to hoist, this instruction is called to do the dirty work.
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///
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@ -480,14 +454,11 @@ void MachineLICM::Hoist(MachineInstr *MI) {
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errs() << "\n";
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});
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// If this is the first instruction being hoisted to the preheader,
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// initialize the CSE map with potential common expressions.
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InitCSEMap(CurPreheader);
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// Look for opportunity to CSE the hoisted instruction.
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unsigned Opcode = MI->getOpcode();
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DenseMap<unsigned, std::vector<const MachineInstr*> >::iterator
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CI = CSEMap.find(Opcode);
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std::pair<unsigned, unsigned> BBOpcPair =
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std::make_pair(CurPreheader->getNumber(), MI->getOpcode());
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DenseMap<std::pair<unsigned, unsigned>,
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std::vector<const MachineInstr*> >::iterator CI = CSEMap.find(BBOpcPair);
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bool DoneCSE = false;
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if (CI != CSEMap.end()) {
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const MachineInstr *Dup = LookForDuplicate(MI, CI->second, RegInfo);
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@ -506,15 +477,15 @@ void MachineLICM::Hoist(MachineInstr *MI) {
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// Otherwise, splice the instruction to the preheader.
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if (!DoneCSE) {
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CurPreheader->splice(CurPreheader->getFirstTerminator(),MI->getParent(),MI);
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CurPreheader->splice(CurPreheader->getFirstTerminator(),
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MI->getParent(), MI);
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// Add to the CSE map.
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if (CI != CSEMap.end())
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CI->second.push_back(MI);
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else {
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std::vector<const MachineInstr*> CSEMIs;
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CSEMIs.push_back(MI);
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CSEMap.insert(std::make_pair(Opcode, CSEMIs));
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CSEMap.insert(std::make_pair(BBOpcPair, CSEMIs));
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}
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}
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@ -1,5 +1,5 @@
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; RUN: llc < %s -mtriple=arm-apple-darwin
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; RUN: llc < %s -mtriple=arm-apple-darwin -stats -info-output-file - | grep "Number of re-materialization" | grep 5
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; RUN: llc < %s -mtriple=arm-apple-darwin -stats -info-output-file - | grep "Number of re-materialization" | grep 4
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%struct.CONTENTBOX = type { i32, i32, i32, i32, i32 }
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%struct.LOCBOX = type { i32, i32, i32, i32 }
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@ -1,5 +1,6 @@
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; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
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; Increment in loop bb.i28.i adjusted to 2, to prevent loop reversal from
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; RUN: llc < %s -march=x86 -mattr=+sse2 -stats |& \
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; RUN: grep {1 .*folded into instructions}
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; Increment in loop bb.128.i adjusted to 2, to prevent loop reversal from
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; kicking in.
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declare fastcc void @rdft(i32, i32, double*, i32*, double*)
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@ -33,9 +34,6 @@ cond_next36.i: ; preds = %cond_next.i
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br label %bb.i28.i
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bb.i28.i: ; preds = %bb.i28.i, %cond_next36.i
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; CHECK: %bb.i28.i
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; CHECK: addl $2
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; CHECK: addl $2
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%j.0.reg2mem.0.i16.i = phi i32 [ 0, %cond_next36.i ], [ %indvar.next39.i, %bb.i28.i ] ; <i32> [#uses=2]
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%din_addr.1.reg2mem.0.i17.i = phi double [ 0.000000e+00, %cond_next36.i ], [ %tmp16.i25.i, %bb.i28.i ] ; <double> [#uses=1]
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%tmp1.i18.i = fptosi double %din_addr.1.reg2mem.0.i17.i to i32 ; <i32> [#uses=2]
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