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Factorize the duplicated logic for choosing the right argument
calling convention out of the fast and normal ISel files, and into the calling convention TD file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117856 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -379,3 +379,35 @@ def CC_X86_32_GHC : CallingConv<[
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// Pass in STG registers: Base, Sp, Hp, R1
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// Pass in STG registers: Base, Sp, Hp, R1
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CCIfType<[i32], CCAssignToReg<[EBX, EBP, EDI, ESI]>>
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CCIfType<[i32], CCAssignToReg<[EBX, EBP, EDI, ESI]>>
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]>;
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]>;
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//===----------------------------------------------------------------------===//
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// X86 Root Argument Calling Conventions
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//===----------------------------------------------------------------------===//
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// This is the root argument convention for the X86-32 backend.
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def CC_X86_32 : CallingConv<[
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CCIfCC<"CallingConv::X86_FastCall", CCDelegateTo<CC_X86_32_FastCall>>,
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CCIfCC<"CallingConv::X86_ThisCall", CCDelegateTo<CC_X86_32_ThisCall>>,
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CCIfCC<"CallingConv::Fast", CCDelegateTo<CC_X86_32_FastCC>>,
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CCIfCC<"CallingConv::GHC", CCDelegateTo<CC_X86_32_GHC>>,
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// Otherwise, drop to normal X86-32 CC
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CCDelegateTo<CC_X86_32_C>
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]>;
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// This is the root argument convention for the X86-64 backend.
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def CC_X86_64 : CallingConv<[
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CCIfCC<"CallingConv::GHC", CCDelegateTo<CC_X86_64_GHC>>,
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// Mingw64 and native Win64 use Win64 CC
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CCIfSubtarget<"isTargetWin64()", CCDelegateTo<CC_X86_Win64_C>>,
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// Otherwise, drop to normal X86-64 CC
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CCDelegateTo<CC_X86_64_C>
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]>;
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// This is the argument convention used for the entire X86 backend.
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def CC_X86 : CallingConv<[
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CCIfSubtarget<"is64Bit()", CCDelegateTo<CC_X86_64>>,
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CCDelegateTo<CC_X86_32>
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]>;
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@ -114,8 +114,6 @@ private:
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bool X86VisitIntrinsicCall(const IntrinsicInst &I);
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bool X86VisitIntrinsicCall(const IntrinsicInst &I);
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bool X86SelectCall(const Instruction *I);
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bool X86SelectCall(const Instruction *I);
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CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool isTailCall = false);
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const X86InstrInfo *getInstrInfo() const {
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const X86InstrInfo *getInstrInfo() const {
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return getTargetMachine()->getInstrInfo();
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return getTargetMachine()->getInstrInfo();
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}
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}
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@ -163,31 +161,6 @@ bool X86FastISel::isTypeLegal(const Type *Ty, EVT &VT, bool AllowI1) {
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#include "X86GenCallingConv.inc"
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#include "X86GenCallingConv.inc"
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/// CCAssignFnForCall - Selects the correct CCAssignFn for a given calling
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/// convention.
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CCAssignFn *X86FastISel::CCAssignFnForCall(CallingConv::ID CC,
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bool isTaillCall) {
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if (Subtarget->is64Bit()) {
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if (CC == CallingConv::GHC)
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return CC_X86_64_GHC;
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else if (Subtarget->isTargetWin64())
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return CC_X86_Win64_C;
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else
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return CC_X86_64_C;
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}
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if (CC == CallingConv::X86_FastCall)
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return CC_X86_32_FastCall;
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else if (CC == CallingConv::X86_ThisCall)
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return CC_X86_32_ThisCall;
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else if (CC == CallingConv::Fast)
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return CC_X86_32_FastCC;
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else if (CC == CallingConv::GHC)
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return CC_X86_32_GHC;
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else
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return CC_X86_32_C;
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}
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/// X86FastEmitLoad - Emit a machine instruction to load a value of type VT.
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/// X86FastEmitLoad - Emit a machine instruction to load a value of type VT.
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/// The address is either pre-computed, i.e. Ptr, or a GlobalAddress, i.e. GV.
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/// The address is either pre-computed, i.e. Ptr, or a GlobalAddress, i.e. GV.
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/// Return true and the result register by reference if it is possible.
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/// Return true and the result register by reference if it is possible.
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@ -1548,7 +1521,7 @@ bool X86FastISel::X86SelectCall(const Instruction *I) {
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CCInfo.AllocateStack(32, 8);
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CCInfo.AllocateStack(32, 8);
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}
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}
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CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CCAssignFnForCall(CC));
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CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CC_X86);
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// Get a count of how many bytes are to be pushed on the stack.
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// Get a count of how many bytes are to be pushed on the stack.
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unsigned NumBytes = CCInfo.getNextStackOffset();
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unsigned NumBytes = CCInfo.getNextStackOffset();
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@ -1457,30 +1457,6 @@ ArgsAreStructReturn(const SmallVectorImpl<ISD::InputArg> &Ins) {
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return Ins[0].Flags.isSRet();
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return Ins[0].Flags.isSRet();
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}
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}
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/// CCAssignFnForNode - Selects the correct CCAssignFn for a the
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/// given CallingConvention value.
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CCAssignFn *X86TargetLowering::CCAssignFnForNode(CallingConv::ID CC) const {
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if (Subtarget->is64Bit()) {
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if (CC == CallingConv::GHC)
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return CC_X86_64_GHC;
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else if (Subtarget->isTargetWin64())
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return CC_X86_Win64_C;
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else
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return CC_X86_64_C;
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}
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if (CC == CallingConv::X86_FastCall)
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return CC_X86_32_FastCall;
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else if (CC == CallingConv::X86_ThisCall)
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return CC_X86_32_ThisCall;
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else if (CC == CallingConv::Fast)
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return CC_X86_32_FastCC;
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else if (CC == CallingConv::GHC)
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return CC_X86_32_GHC;
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else
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return CC_X86_32_C;
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}
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/// CreateCopyOfByValArgument - Make a copy of an aggregate at address specified
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/// CreateCopyOfByValArgument - Make a copy of an aggregate at address specified
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/// by "Src" to address "Dst" with size and alignment information specified by
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/// by "Src" to address "Dst" with size and alignment information specified by
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/// the specific parameter attribute. The copy will be passed as a byval
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/// the specific parameter attribute. The copy will be passed as a byval
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@ -1576,7 +1552,7 @@ X86TargetLowering::LowerFormalArguments(SDValue Chain,
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SmallVector<CCValAssign, 16> ArgLocs;
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SmallVector<CCValAssign, 16> ArgLocs;
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CCState CCInfo(CallConv, isVarArg, getTargetMachine(),
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CCState CCInfo(CallConv, isVarArg, getTargetMachine(),
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ArgLocs, *DAG.getContext());
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ArgLocs, *DAG.getContext());
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CCInfo.AnalyzeFormalArguments(Ins, CCAssignFnForNode(CallConv));
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CCInfo.AnalyzeFormalArguments(Ins, CC_X86);
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unsigned LastVal = ~0U;
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unsigned LastVal = ~0U;
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SDValue ArgValue;
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SDValue ArgValue;
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@ -1895,7 +1871,7 @@ X86TargetLowering::LowerCall(SDValue Chain, SDValue Callee,
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SmallVector<CCValAssign, 16> ArgLocs;
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SmallVector<CCValAssign, 16> ArgLocs;
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CCState CCInfo(CallConv, isVarArg, getTargetMachine(),
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CCState CCInfo(CallConv, isVarArg, getTargetMachine(),
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ArgLocs, *DAG.getContext());
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ArgLocs, *DAG.getContext());
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CCInfo.AnalyzeCallOperands(Outs, CCAssignFnForNode(CallConv));
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CCInfo.AnalyzeCallOperands(Outs, CC_X86);
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// Get a count of how many bytes are to be pushed on the stack.
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// Get a count of how many bytes are to be pushed on the stack.
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unsigned NumBytes = CCInfo.getNextStackOffset();
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unsigned NumBytes = CCInfo.getNextStackOffset();
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@ -2478,7 +2454,7 @@ X86TargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
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SmallVector<CCValAssign, 16> ArgLocs;
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SmallVector<CCValAssign, 16> ArgLocs;
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CCState CCInfo(CalleeCC, isVarArg, getTargetMachine(),
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CCState CCInfo(CalleeCC, isVarArg, getTargetMachine(),
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ArgLocs, *DAG.getContext());
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ArgLocs, *DAG.getContext());
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CCInfo.AnalyzeCallOperands(Outs, CCAssignFnForNode(CalleeCC));
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CCInfo.AnalyzeCallOperands(Outs, CC_X86);
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if (CCInfo.getNextStackOffset()) {
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if (CCInfo.getNextStackOffset()) {
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MachineFunction &MF = DAG.getMachineFunction();
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MachineFunction &MF = DAG.getMachineFunction();
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if (MF.getInfo<X86MachineFunctionInfo>()->getBytesToPopOnReturn())
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if (MF.getInfo<X86MachineFunctionInfo>()->getBytesToPopOnReturn())
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@ -717,7 +717,6 @@ namespace llvm {
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SDValue Chain, bool IsTailCall, bool Is64Bit,
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SDValue Chain, bool IsTailCall, bool Is64Bit,
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int FPDiff, DebugLoc dl) const;
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int FPDiff, DebugLoc dl) const;
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CCAssignFn *CCAssignFnForNode(CallingConv::ID CallConv) const;
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unsigned GetAlignedArgumentStackSize(unsigned StackSize,
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unsigned GetAlignedArgumentStackSize(unsigned StackSize,
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SelectionDAG &DAG) const;
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SelectionDAG &DAG) const;
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