mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-15 07:34:33 +00:00
[mips] Refactor calls to setCanHaveModuleDir.
Summary: Moved some calls to setCanHaveModuleDir to the MipsTargetStreamer base class and removed the resulting empty functions from the MipsTargetELFStreamer class. Also fixed a missing call to setCanHaveModuleDir in MipsTargetELFStreamer::emitDirectiveSetMicroMips. Reviewers: dsanders Reviewed By: dsanders Subscribers: tomatabacu Differential Revision: http://reviews.llvm.org/D4781 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215542 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Toma Tabacu
parent
adc58a657b
commit
48017d1bcd
@ -35,15 +35,21 @@ MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
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void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
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void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
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void MipsTargetStreamer::emitDirectiveSetMips16() {}
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void MipsTargetStreamer::emitDirectiveSetNoMips16() {}
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void MipsTargetStreamer::emitDirectiveSetReorder() {}
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void MipsTargetStreamer::emitDirectiveSetNoMips16() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetReorder() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
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void MipsTargetStreamer::emitDirectiveSetMacro() {}
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void MipsTargetStreamer::emitDirectiveSetNoMacro() {}
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void MipsTargetStreamer::emitDirectiveSetMacro() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetNoMacro() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetMsa() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetNoMsa() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetAt() {}
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void MipsTargetStreamer::emitDirectiveSetNoAt() {}
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void MipsTargetStreamer::emitDirectiveSetAt() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetNoAt() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
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void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
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void MipsTargetStreamer::emitDirectiveAbiCalls() {}
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@ -56,18 +62,30 @@ void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
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void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
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void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
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}
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void MipsTargetStreamer::emitDirectiveSetMips1() {}
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void MipsTargetStreamer::emitDirectiveSetMips2() {}
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void MipsTargetStreamer::emitDirectiveSetMips3() {}
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void MipsTargetStreamer::emitDirectiveSetMips4() {}
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void MipsTargetStreamer::emitDirectiveSetMips5() {}
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void MipsTargetStreamer::emitDirectiveSetMips32() {}
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void MipsTargetStreamer::emitDirectiveSetMips32R2() {}
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void MipsTargetStreamer::emitDirectiveSetMips32R6() {}
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void MipsTargetStreamer::emitDirectiveSetMips64() {}
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void MipsTargetStreamer::emitDirectiveSetMips64R2() {}
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void MipsTargetStreamer::emitDirectiveSetMips64R6() {}
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void MipsTargetStreamer::emitDirectiveSetDsp() {}
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void MipsTargetStreamer::emitDirectiveSetMips1() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetMips2() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetMips3() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetMips4() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetMips5() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveSetMips32() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetMips32R2() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetMips32R6() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetMips64() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetMips64R2() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetMips64R6() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetStreamer::emitDirectiveSetDsp() { setCanHaveModuleDir(false); }
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void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {}
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void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
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const MCSymbol &Sym, bool IsReg) {
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@ -99,12 +117,12 @@ void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
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void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
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OS << "\t.set\tnomips16\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetNoMips16();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
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OS << "\t.set\treorder\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetReorder();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
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@ -114,12 +132,12 @@ void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
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void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
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OS << "\t.set\tmacro\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetMacro();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
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OS << "\t.set\tnomacro\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetNoMacro();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
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@ -134,12 +152,12 @@ void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
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void MipsTargetAsmStreamer::emitDirectiveSetAt() {
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OS << "\t.set\tat\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetAt();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
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OS << "\t.set\tnoat\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetNoAt();
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}
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void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
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@ -176,62 +194,62 @@ void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
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void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
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OS << "\t.set\tmips1\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetMips1();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
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OS << "\t.set\tmips2\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetMips2();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
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OS << "\t.set\tmips3\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetMips3();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
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OS << "\t.set\tmips4\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetMips4();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
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OS << "\t.set\tmips5\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetMips5();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
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OS << "\t.set\tmips32\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetMips32();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
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OS << "\t.set\tmips32r2\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetMips32R2();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
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OS << "\t.set\tmips32r6\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetMips32R6();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
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OS << "\t.set\tmips64\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetMips64();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
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OS << "\t.set\tmips64r2\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetMips64R2();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
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OS << "\t.set\tmips64r6\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetMips64R6();
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}
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void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
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OS << "\t.set\tdsp\n";
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setCanHaveModuleDir(false);
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MipsTargetStreamer::emitDirectiveSetDsp();
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}
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// Print a 32 bit hex number with all numbers.
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static void printHex32(unsigned Value, raw_ostream &OS) {
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@ -440,6 +458,7 @@ void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
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unsigned Flags = MCA.getELFHeaderEFlags();
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Flags |= ELF::EF_MIPS_MICROMIPS;
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MCA.setELFHeaderEFlags(Flags);
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
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@ -455,16 +474,6 @@ void MipsTargetELFStreamer::emitDirectiveSetMips16() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetNoMips16() {
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// FIXME: implement.
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetReorder() {
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// FIXME: implement.
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
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MCAssembler &MCA = getStreamer().getAssembler();
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unsigned Flags = MCA.getELFHeaderEFlags();
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@ -473,26 +482,6 @@ void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetMacro() {
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// FIXME: implement.
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetNoMacro() {
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// FIXME: implement.
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetAt() {
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// FIXME: implement.
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetNoAt() {
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// FIXME: implement.
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
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MCAssembler &MCA = getStreamer().getAssembler();
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MCContext &Context = MCA.getContext();
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@ -602,54 +591,6 @@ void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
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FPROffset = FPUTopSavedRegOff;
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips1() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips2() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips3() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips4() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips5() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips32() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips32R2() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips32R6() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips64() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips64R2() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetMips64R6() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveSetDsp() {
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setCanHaveModuleDir(false);
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}
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void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) {
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// .cpload $reg
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// This directive expands to:
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@ -191,14 +191,8 @@ public:
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void emitDirectiveSetMicroMips() override;
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void emitDirectiveSetNoMicroMips() override;
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void emitDirectiveSetMips16() override;
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void emitDirectiveSetNoMips16() override;
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void emitDirectiveSetReorder() override;
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void emitDirectiveSetNoReorder() override;
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void emitDirectiveSetMacro() override;
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void emitDirectiveSetNoMacro() override;
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void emitDirectiveSetAt() override;
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void emitDirectiveSetNoAt() override;
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void emitDirectiveEnd(StringRef Name) override;
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void emitDirectiveEnt(const MCSymbol &Symbol) override;
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@ -212,19 +206,6 @@ public:
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void emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) override;
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void emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) override;
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void emitDirectiveSetMips1() override;
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void emitDirectiveSetMips2() override;
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void emitDirectiveSetMips3() override;
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void emitDirectiveSetMips4() override;
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void emitDirectiveSetMips5() override;
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void emitDirectiveSetMips32() override;
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void emitDirectiveSetMips32R2() override;
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void emitDirectiveSetMips32R6() override;
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void emitDirectiveSetMips64() override;
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void emitDirectiveSetMips64R2() override;
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void emitDirectiveSetMips64R6() override;
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void emitDirectiveSetDsp() override;
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// PIC support
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virtual void emitDirectiveCpload(unsigned RegNo);
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void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
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