mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-17 20:29:31 +00:00
Don't record instructions for copying method arguments in the
AddedInstrns sets for the first machine instruction. It is hard to ensure that the right order is preserved, and sure enough, the order was broken. Instead, use a separate set for the function entry. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2312 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vikram S. Adve
parent
93240fe6b1
commit
4876209aa6
@ -290,14 +290,13 @@ void PhyRegAlloc::buildInterferenceGraphs()
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// get the iterator for machine instructions
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//
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const MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
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MachineCodeForBasicBlock::const_iterator
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MInstIterator = MIVec.begin();
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MachineCodeForBasicBlock::const_iterator MII = MIVec.begin();
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// iterate over all the machine instructions in BB
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//
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for( ; MInstIterator != MIVec.end(); ++MInstIterator) {
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for( ; MII != MIVec.end(); ++MII) {
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const MachineInstr *MInst = *MInstIterator;
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const MachineInstr *MInst = *MII;
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// get the LV set after the instruction
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//
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@ -428,8 +427,6 @@ void PhyRegAlloc::addInterferencesForArgs() {
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}
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//----------------------------------------------------------------------------
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// This method is called after register allocation is complete to set the
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// allocated reisters in the machine code. This code will add register numbers
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@ -438,21 +435,79 @@ void PhyRegAlloc::addInterferencesForArgs() {
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// additional instructions produced by the register allocator to the
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// instruction stream.
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//----------------------------------------------------------------------------
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//-----------------------------
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// Utility functions used below
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//-----------------------------
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inline void
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PrependInstructions(std::deque<MachineInstr *> &IBef,
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MachineCodeForBasicBlock& MIVec,
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MachineCodeForBasicBlock::iterator& MII,
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const std::string& msg)
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{
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if (!IBef.empty())
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{
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MachineInstr* OrigMI = *MII;
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std::deque<MachineInstr *>::iterator AdIt;
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for (AdIt = IBef.begin(); AdIt != IBef.end() ; ++AdIt)
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{
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if (DEBUG_RA) {
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if (OrigMI) cerr << "For MInst: " << *OrigMI;
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cerr << msg << " PREPENDed instr: " << **AdIt << "\n";
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}
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MII = MIVec.insert(MII, *AdIt);
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++MII;
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}
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}
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}
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inline void
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AppendInstructions(std::deque<MachineInstr *> &IAft,
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MachineCodeForBasicBlock& MIVec,
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MachineCodeForBasicBlock::iterator& MII,
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const std::string& msg)
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{
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if (!IAft.empty())
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{
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MachineInstr* OrigMI = *MII;
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std::deque<MachineInstr *>::iterator AdIt;
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for( AdIt = IAft.begin(); AdIt != IAft.end() ; ++AdIt )
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{
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if(DEBUG_RA) {
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if (OrigMI) cerr << "For MInst: " << *OrigMI;
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cerr << msg << " APPENDed instr: " << **AdIt << "\n";
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}
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++MII; // insert before the next instruction
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MII = MIVec.insert(MII, *AdIt);
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}
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}
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}
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void PhyRegAlloc::updateMachineCode()
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{
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const BasicBlock* entryBB = Meth->getEntryNode();
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if (entryBB) {
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MachineCodeForBasicBlock& MIVec = entryBB->getMachineInstrVec();
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MachineCodeForBasicBlock::iterator MII = MIVec.begin();
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// Insert any instructions needed at method entry
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PrependInstructions(AddedInstrAtEntry.InstrnsBefore, MIVec, MII,
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"At function entry: \n");
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assert(AddedInstrAtEntry.InstrnsAfter.empty() &&
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"InstrsAfter should be unnecessary since we are just inserting at "
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"the function entry point here.");
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}
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for (Function::const_iterator BBI = Meth->begin(), BBE = Meth->end();
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BBI != BBE; ++BBI) {
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// get the iterator for machine instructions
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//
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MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
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MachineCodeForBasicBlock::iterator MInstIterator = MIVec.begin();
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// iterate over all the machine instructions in BB
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//
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for( ; MInstIterator != MIVec.end(); ++MInstIterator) {
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MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
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for(MachineCodeForBasicBlock::iterator MII = MIVec.begin();
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MII != MIVec.end(); ++MII) {
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MachineInstr *MInst = *MInstIterator;
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MachineInstr *MInst = *MII;
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unsigned Opcode = MInst->getOpCode();
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@ -565,26 +620,9 @@ void PhyRegAlloc::updateMachineCode()
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// instruction, add them now.
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//
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if(AddedInstrMap.count(MInst)) {
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std::deque<MachineInstr *> &IBef = AddedInstrMap[MInst].InstrnsBefore;
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if( ! IBef.empty() ) {
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std::deque<MachineInstr *>::iterator AdIt;
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for( AdIt = IBef.begin(); AdIt != IBef.end() ; ++AdIt ) {
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if( DEBUG_RA) {
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cerr << "For inst " << *MInst;
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cerr << " PREPENDed instr: " << **AdIt << "\n";
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}
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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++MInstIterator;
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}
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}
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PrependInstructions(AddedInstrMap[MInst].InstrnsBefore, MIVec, MII,"");
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}
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// If there are instructions to be added *after* this machine
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// instruction, add them now
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//
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@ -597,41 +635,15 @@ void PhyRegAlloc::updateMachineCode()
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unsigned delay;
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if ((delay=TM.getInstrInfo().getNumDelaySlots(MInst->getOpCode())) >0){
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move2DelayedInstr(MInst, *(MInstIterator+delay) );
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move2DelayedInstr(MInst, *(MII+delay) );
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if(DEBUG_RA) cerr<< "\nMoved an added instr after the delay slot";
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}
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else {
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// Here we can add the "instructions after" to the current
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// instruction since there are no delay slots for this instruction
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std::deque<MachineInstr *> &IAft = AddedInstrMap[MInst].InstrnsAfter;
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if (!IAft.empty()) {
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++MInstIterator; // advance to the next instruction
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std::deque<MachineInstr *>::iterator AdIt;
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for( AdIt = IAft.begin(); AdIt != IAft.end() ; ++AdIt ) {
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if(DEBUG_RA) {
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cerr << "For inst " << *MInst;
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cerr << " APPENDed instr: " << **AdIt << "\n";
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}
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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++MInstIterator;
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}
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// MInsterator already points to the next instr. Since the
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// for loop also increments it, decrement it to point to the
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// instruction added last
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--MInstIterator;
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}
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AppendInstructions(AddedInstrMap[MInst].InstrnsAfter, MIVec, MII,"");
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} // if not delay
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}
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@ -944,11 +956,11 @@ void PhyRegAlloc::printMachineCode()
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// get the iterator for machine instructions
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MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
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MachineCodeForBasicBlock::iterator MInstIterator = MIVec.begin();
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MachineCodeForBasicBlock::iterator MII = MIVec.begin();
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// iterate over all the machine instructions in BB
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for( ; MInstIterator != MIVec.end(); ++MInstIterator) {
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MachineInstr *const MInst = *MInstIterator;
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for( ; MII != MIVec.end(); ++MII) {
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MachineInstr *const MInst = *MII;
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cerr << "\n\t";
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cerr << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
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@ -1063,7 +1075,7 @@ void PhyRegAlloc::colorIncomingArgs()
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const MachineInstr *FirstMI = FirstBB->getMachineInstrVec().front();
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assert(FirstMI && "No machine instruction in entry BB");
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MRI.colorMethodArgs(Meth, LRI, &AddedInstrMap[FirstMI]);
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MRI.colorMethodArgs(Meth, LRI, &AddedInstrAtEntry);
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}
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@ -290,14 +290,13 @@ void PhyRegAlloc::buildInterferenceGraphs()
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// get the iterator for machine instructions
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//
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const MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
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MachineCodeForBasicBlock::const_iterator
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MInstIterator = MIVec.begin();
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MachineCodeForBasicBlock::const_iterator MII = MIVec.begin();
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// iterate over all the machine instructions in BB
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//
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for( ; MInstIterator != MIVec.end(); ++MInstIterator) {
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for( ; MII != MIVec.end(); ++MII) {
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const MachineInstr *MInst = *MInstIterator;
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const MachineInstr *MInst = *MII;
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// get the LV set after the instruction
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//
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@ -428,8 +427,6 @@ void PhyRegAlloc::addInterferencesForArgs() {
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}
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//----------------------------------------------------------------------------
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// This method is called after register allocation is complete to set the
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// allocated reisters in the machine code. This code will add register numbers
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@ -438,21 +435,79 @@ void PhyRegAlloc::addInterferencesForArgs() {
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// additional instructions produced by the register allocator to the
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// instruction stream.
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//----------------------------------------------------------------------------
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//-----------------------------
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// Utility functions used below
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//-----------------------------
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inline void
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PrependInstructions(std::deque<MachineInstr *> &IBef,
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MachineCodeForBasicBlock& MIVec,
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MachineCodeForBasicBlock::iterator& MII,
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const std::string& msg)
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{
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if (!IBef.empty())
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{
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MachineInstr* OrigMI = *MII;
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std::deque<MachineInstr *>::iterator AdIt;
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for (AdIt = IBef.begin(); AdIt != IBef.end() ; ++AdIt)
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{
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if (DEBUG_RA) {
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if (OrigMI) cerr << "For MInst: " << *OrigMI;
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cerr << msg << " PREPENDed instr: " << **AdIt << "\n";
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}
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MII = MIVec.insert(MII, *AdIt);
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++MII;
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}
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}
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}
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inline void
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AppendInstructions(std::deque<MachineInstr *> &IAft,
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MachineCodeForBasicBlock& MIVec,
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MachineCodeForBasicBlock::iterator& MII,
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const std::string& msg)
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{
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if (!IAft.empty())
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{
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MachineInstr* OrigMI = *MII;
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std::deque<MachineInstr *>::iterator AdIt;
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for( AdIt = IAft.begin(); AdIt != IAft.end() ; ++AdIt )
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{
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if(DEBUG_RA) {
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if (OrigMI) cerr << "For MInst: " << *OrigMI;
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cerr << msg << " APPENDed instr: " << **AdIt << "\n";
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}
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++MII; // insert before the next instruction
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MII = MIVec.insert(MII, *AdIt);
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}
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}
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}
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void PhyRegAlloc::updateMachineCode()
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{
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const BasicBlock* entryBB = Meth->getEntryNode();
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if (entryBB) {
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MachineCodeForBasicBlock& MIVec = entryBB->getMachineInstrVec();
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MachineCodeForBasicBlock::iterator MII = MIVec.begin();
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// Insert any instructions needed at method entry
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PrependInstructions(AddedInstrAtEntry.InstrnsBefore, MIVec, MII,
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"At function entry: \n");
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assert(AddedInstrAtEntry.InstrnsAfter.empty() &&
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"InstrsAfter should be unnecessary since we are just inserting at "
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"the function entry point here.");
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}
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for (Function::const_iterator BBI = Meth->begin(), BBE = Meth->end();
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BBI != BBE; ++BBI) {
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// get the iterator for machine instructions
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//
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MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
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MachineCodeForBasicBlock::iterator MInstIterator = MIVec.begin();
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// iterate over all the machine instructions in BB
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//
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for( ; MInstIterator != MIVec.end(); ++MInstIterator) {
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MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
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for(MachineCodeForBasicBlock::iterator MII = MIVec.begin();
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MII != MIVec.end(); ++MII) {
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MachineInstr *MInst = *MInstIterator;
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MachineInstr *MInst = *MII;
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unsigned Opcode = MInst->getOpCode();
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@ -565,26 +620,9 @@ void PhyRegAlloc::updateMachineCode()
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// instruction, add them now.
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//
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if(AddedInstrMap.count(MInst)) {
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std::deque<MachineInstr *> &IBef = AddedInstrMap[MInst].InstrnsBefore;
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if( ! IBef.empty() ) {
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std::deque<MachineInstr *>::iterator AdIt;
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for( AdIt = IBef.begin(); AdIt != IBef.end() ; ++AdIt ) {
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if( DEBUG_RA) {
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cerr << "For inst " << *MInst;
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cerr << " PREPENDed instr: " << **AdIt << "\n";
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}
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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++MInstIterator;
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}
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}
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PrependInstructions(AddedInstrMap[MInst].InstrnsBefore, MIVec, MII,"");
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}
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// If there are instructions to be added *after* this machine
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// instruction, add them now
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//
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@ -597,41 +635,15 @@ void PhyRegAlloc::updateMachineCode()
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unsigned delay;
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if ((delay=TM.getInstrInfo().getNumDelaySlots(MInst->getOpCode())) >0){
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move2DelayedInstr(MInst, *(MInstIterator+delay) );
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move2DelayedInstr(MInst, *(MII+delay) );
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if(DEBUG_RA) cerr<< "\nMoved an added instr after the delay slot";
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}
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else {
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// Here we can add the "instructions after" to the current
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// instruction since there are no delay slots for this instruction
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std::deque<MachineInstr *> &IAft = AddedInstrMap[MInst].InstrnsAfter;
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if (!IAft.empty()) {
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++MInstIterator; // advance to the next instruction
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std::deque<MachineInstr *>::iterator AdIt;
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for( AdIt = IAft.begin(); AdIt != IAft.end() ; ++AdIt ) {
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if(DEBUG_RA) {
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cerr << "For inst " << *MInst;
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cerr << " APPENDed instr: " << **AdIt << "\n";
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}
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MInstIterator = MIVec.insert( MInstIterator, *AdIt );
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++MInstIterator;
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}
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// MInsterator already points to the next instr. Since the
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// for loop also increments it, decrement it to point to the
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// instruction added last
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--MInstIterator;
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}
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AppendInstructions(AddedInstrMap[MInst].InstrnsAfter, MIVec, MII,"");
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} // if not delay
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}
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@ -944,11 +956,11 @@ void PhyRegAlloc::printMachineCode()
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// get the iterator for machine instructions
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MachineCodeForBasicBlock& MIVec = (*BBI)->getMachineInstrVec();
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MachineCodeForBasicBlock::iterator MInstIterator = MIVec.begin();
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MachineCodeForBasicBlock::iterator MII = MIVec.begin();
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// iterate over all the machine instructions in BB
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for( ; MInstIterator != MIVec.end(); ++MInstIterator) {
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MachineInstr *const MInst = *MInstIterator;
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for( ; MII != MIVec.end(); ++MII) {
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MachineInstr *const MInst = *MII;
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cerr << "\n\t";
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cerr << TargetInstrDescriptors[MInst->getOpCode()].opCodeString;
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@ -1063,7 +1075,7 @@ void PhyRegAlloc::colorIncomingArgs()
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const MachineInstr *FirstMI = FirstBB->getMachineInstrVec().front();
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assert(FirstMI && "No machine instruction in entry BB");
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MRI.colorMethodArgs(Meth, LRI, &AddedInstrMap[FirstMI]);
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MRI.colorMethodArgs(Meth, LRI, &AddedInstrAtEntry);
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}
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