6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-17 20:29:31 +00:00
Code Issues Projects Releases Wiki Activity

Improve printing during dumps.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@2311 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Vikram S. Adve 2002-04-25 04:31:18 +00:00
parent 03d33bd264
commit 93240fe6b1
1 changed files with 16 additions and 28 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

44
lib/CodeGen/MachineInstr.cpp
View File

@ -84,6 +84,17 @@ MachineInstr::dump(unsigned int indent) const
cerr << *this;
}
static inline std::ostream &OutputValue(std::ostream &os,
const Value* val)
{
os << "(val ";
if (val && val->hasName())
return os << val->getName();
else
return os << (void*) val; // print address only
os << ")";
}
std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr)
{
os << TargetInstrDescriptors[minstr.opCode].opCodeString;
@ -94,34 +105,17 @@ std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr)
os << "*";
}
#undef DEBUG_VAL_OP_ITERATOR
#ifdef DEBUG_VAL_OP_ITERATOR
os << "\n\tValue operands are: ";
for (MachineInstr::val_const_op_iterator vo(&minstr); ! vo.done(); ++vo)
{
const Value* val = *vo;
os << val << (vo.isDef()? "(def), " : ", ");
}
#endif
#if 1
// code for printing implict references
unsigned NumOfImpRefs = minstr.getNumImplicitRefs();
if( NumOfImpRefs > 0 ) {
os << "\tImplicit:";
os << "\tImplicit: ";
for(unsigned z=0; z < NumOfImpRefs; z++) {
os << minstr.getImplicitRef(z);
OutputValue(os, minstr.getImplicitRef(z));
if( minstr.implicitRefIsDefined(z)) os << "*";
os << "\t";
}
}
#endif
return os << "\n";
}
@ -133,15 +127,9 @@ static inline std::ostream &OutputOperand(std::ostream &os,
{
case MachineOperand::MO_CCRegister:
case MachineOperand::MO_VirtualRegister:
val = mop.getVRegValue();
os << "(val ";
if (val && val->hasName())
os << val->getName();
else
os << val;
return os << ")";
return OutputValue(os, mop.getVRegValue());
case MachineOperand::MO_MachineRegister:
return os << "(" << mop.getMachineRegNum() << ")";
return os << "(" << mop.getMachineRegNum() << ")";
default:
assert(0 && "Unknown operand type");
return os;