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Enable generation of AssertSext and AssertZext in the PPC backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23168 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -214,8 +214,13 @@ PPC32TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
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MF.addLiveIn(GPR[GPR_idx]);
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argt = newroot = DAG.getCopyFromReg(DAG.getRoot(),
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GPR[GPR_idx], MVT::i32);
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if (ObjectVT != MVT::i32)
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argt = DAG.getNode(ISD::TRUNCATE, ObjectVT, newroot);
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if (ObjectVT != MVT::i32) {
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unsigned AssertOp = I->getType()->isSigned() ? ISD::AssertSext
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: ISD::AssertZext;
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argt = DAG.getNode(AssertOp, MVT::i32, argt,
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DAG.getValueType(ObjectVT));
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argt = DAG.getNode(ISD::TRUNCATE, ObjectVT, argt);
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}
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} else {
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needsLoad = true;
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}
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